Low-power ternary content-addressable memory design based on a voltage self-controlled fin field-effect transistor segment
References
Index Terms
- Low-power ternary content-addressable memory design based on a voltage self-controlled fin field-effect transistor segment
Recommendations
Standby and dynamic power minimization using enhanced hybrid power gating structure for deep-submicron CMOS VLSI
Scaling down of CMOS Technology reduces supply voltage which helps evade device botch caused by high electric fields in the conducting channel under the gate and gate oxide. Voltage scaling lessens circuit power consumption but increases delay of logic ...
Certain investigations in achieving low power dissipation for SRAM cell
AbstractThe modern semiconductor industry is evolving quite rapidly. Portable and mobile devices are becoming smaller every day and there is also a growing demand for longer battery power. With these demands it is important for researchers to ...
A design of low swing and multi threshold voltage based low power 12T SRAM cell
Proposed low power 12T MTCMOS based SRAM cell.Display Omitted A novel low power 12T MTCMOS based SRAM cell is proposed.Charge recycling technique used for reducing the current leakage during transition mode.Use voltage sources to reduce the dynamic ...
Comments
Please enable JavaScript to view thecomments powered by Disqus.Information & Contributors
Information
Published In
Publisher
Pergamon Press, Inc.
United States
Publication History
Author Tags
Qualifiers
- Research-article
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 0Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Other Metrics
Citations
View Options
View options
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in