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Analysis of multiprocessor cache organizations with alternative main memory update policies

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K. S. FuAuthors Info & Claims

ISCA '81: Proceedings of the 8th annual symposium on Computer Architecture

Pages 89 - 105

Published: 12 May 1981 Publication History

Abstract

Cache memory has played a significant role in the memory hierarchy and has been used extensively in large systems and minisystems. The effectiveness of cache memories with alternative main memory update policies in a multiprocessor system is a major concern in this paper. The performances of write-through with write-allocation or no-write allocation, buffered write-through, flag-swap, and buffered flag-swap policies have been analyzed. Because of the dominating cost of the interface between processors and main memory modules in the multiprocessor system, the effect of varying the bus width or block size has also been considered. Queuing models were developed to analyze these alternative organizations, and results predicted by the models were validated by a set of simulations.

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Cited By

Eggers SKatz RSiegel H(1988)A characterization of sharing in parallel programs and its application to coherency protocol evaluationProceedings of the 15th Annual International Symposium on Computer architecture10.5555/52400.52442(373-382)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/52400.52442
Eggers SKatz R(1988)A characterization of sharing in parallel programs and its application to coherency protocol evaluationACM SIGARCH Computer Architecture News10.1145/633625.5244216:2(373-382)Online publication date: 17-May-1988
https://dl.acm.org/doi/10.1145/633625.52442

Index Terms

Analysis of multiprocessor cache organizations with alternative main memory update policies
1. Hardware
  1. Hardware validation
  2. Integrated circuits
    1. Semiconductor memory
      1. Dynamic memory

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cover image ACM Conferences

ISCA '81: Proceedings of the 8th annual symposium on Computer Architecture

May 1981

516 pages

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SIGARCH: ACM Special Interest Group on Computer Architecture
IEEE-CS: Computer Society

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 12 May 1981

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Cited By

Eggers SKatz RSiegel H(1988)A characterization of sharing in parallel programs and its application to coherency protocol evaluationProceedings of the 15th Annual International Symposium on Computer architecture10.5555/52400.52442(373-382)Online publication date: 1-Jun-1988
https://dl.acm.org/doi/10.5555/52400.52442
Eggers SKatz R(1988)A characterization of sharing in parallel programs and its application to coherency protocol evaluationACM SIGARCH Computer Architecture News10.1145/633625.5244216:2(373-382)Online publication date: 17-May-1988
https://dl.acm.org/doi/10.1145/633625.52442

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