Nothing Special   »   [go: up one dir, main page]

skip to main content
10.5555/882471.883302guideproceedingsArticle/Chapter ViewAbstractPublication PagespactConference Proceedingsconference-collections
Article

Swing Modulo Scheduling: A Lifetime-Sensitive Approach

Published: 20 October 1996 Publication History

Abstract

This paper presents a novel software pipelining approach, which is called Swing Modulo Scheduling (SMS). It generates schedules that are near optimal in terms of initiation interval, register requirements and stage count. Swing Modulo Scheduling is an heuristic approach that has a low computational cost. The paper describes the technique and evaluates it for the Perfect Club benchmark suite. SMS is compared with other heuristic methods showing that it outperforms them in terms of the quality of the obtained schedules and compilation time. SMS is also compared with an integer linear programming approach that generates optimum schedules but with a huge computational cost, which makes it feasible only for very small loops. For a set of small loops, SMS obtained the optimum initiation interval in all the cases and its schedules required only 5% more registers and a 1% higher stage count than the optimum.

Cited By

View all
  • (2017)Automatic generation of fast BLAS3-GEMM: a portable compiler approachProceedings of the 2017 International Symposium on Code Generation and Optimization10.5555/3049832.3049846(122-133)Online publication date: 4-Feb-2017
  • (2017)FlexCLProceedings of the 54th Annual Design Automation Conference 201710.1145/3061639.3062251(1-6)Online publication date: 18-Jun-2017
  • (2016)ILP-based modulo scheduling for high-level synthesisProceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems10.1145/2968455.2968512(1-10)Online publication date: 1-Oct-2016
  • Show More Cited By

Recommendations

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image Guide Proceedings
PACT '96: Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques
October 1996

Publisher

IEEE Computer Society

United States

Publication History

Published: 20 October 1996

Author Tags

  1. Fine Grain Parallelism
  2. Instruction Scheduling
  3. Loop Scheduling
  4. Register Requirements
  5. Software Pipelining
  6. VLIW and Superscalar Architecture

Qualifiers

  • Article

Acceptance Rates

Overall Acceptance Rate 121 of 471 submissions, 26%

Contributors

Other Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

  • Downloads (Last 12 months)0
  • Downloads (Last 6 weeks)0
Reflects downloads up to 12 Nov 2024

Other Metrics

Citations

Cited By

View all
  • (2017)Automatic generation of fast BLAS3-GEMM: a portable compiler approachProceedings of the 2017 International Symposium on Code Generation and Optimization10.5555/3049832.3049846(122-133)Online publication date: 4-Feb-2017
  • (2017)FlexCLProceedings of the 54th Annual Design Automation Conference 201710.1145/3061639.3062251(1-6)Online publication date: 18-Jun-2017
  • (2016)ILP-based modulo scheduling for high-level synthesisProceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems10.1145/2968455.2968512(1-10)Online publication date: 1-Oct-2016
  • (2015)High-level software-pipelining in LLVMProceedings of the 18th International Workshop on Software and Compilers for Embedded Systems10.1145/2764967.2771935(97-100)Online publication date: 1-Jun-2015
  • (2015)VLIW Code Generation for a Convolutional Network AcceleratorProceedings of the 18th International Workshop on Software and Compilers for Embedded Systems10.1145/2764967.2771928(117-120)Online publication date: 1-Jun-2015
  • (2015)Enhancing Design Space Exploration by Extending CPU/GPU Specifications onto FPGAsACM Transactions on Embedded Computing Systems10.1145/265620714:2(1-23)Online publication date: 17-Feb-2015
  • (2014)Multithreaded pipeline synthesis for data-parallel kernelsProceedings of the 2014 IEEE/ACM International Conference on Computer-Aided Design10.5555/2691365.2691510(718-725)Online publication date: 3-Nov-2014
  • (2014)Flushing-Enabled Loop Pipelining for High-Level SynthesisProceedings of the 51st Annual Design Automation Conference10.1145/2593069.2593143(1-6)Online publication date: 1-Jun-2014
  • (2014)Author retrospective for optimum modulo schedules for minimum register requirementsACM International Conference on Supercomputing 25th Anniversary Volume10.1145/2591635.2591653(35-36)Online publication date: 10-Jun-2014
  • (2013)The benefits of using variable-length pipelined operations in high-level synthesisACM Transactions on Embedded Computing Systems10.1145/2539036.253904813:3(1-23)Online publication date: 24-Dec-2013
  • Show More Cited By

View Options

View options

Media

Figures

Other

Tables

Share

Share

Share this Publication link

Share on social media