Visualization of Partial Order Models in VLSI Design Flow
Authors: 
A. Bystrov, M. Koutny, A. YakovlevAuthors Info & Claims
Abstract
No abstract available.
Recommendations
A VLSI Modulo m Multiplier
A novel method to compute the exact digits of the modulo m product of integers is proposed, and a modulo m multiply structure is defined. Such a structure can be implemented by means of a few fast VLSI binary multipliers, and a response time of about ...
Comments
Please enable JavaScript to view thecomments powered by Disqus.Information & Contributors
Information
Published In
March 2002
1072 pages
ISBN:0769514715
Sponsors
Publisher
IEEE Computer Society
United States
Publication History
Published: 04 March 2002
Check for updates
Qualifiers
- Article
Conference
DATE02
Sponsor:
Acceptance Rates
Overall Acceptance Rate 518 of 1,794 submissions, 29%
Upcoming Conference
DATE '25
- Sponsor:
- sigda
Contributors
Other Metrics
Bibliometrics & Citations
Bibliometrics
Article Metrics
- 0Total Citations
- 75Total Downloads
- Downloads (Last 12 months)0
- Downloads (Last 6 weeks)0
Reflects downloads up to 13 Nov 2024
Other Metrics
Citations
View Options
Get Access
Login options
Check if you have access through your login credentials or your institution to get full access on this article.
Sign in