Test generation in VLSI circuits for crosstalk noise

This paper addresses the problem of efficiently andaccurately generating two-vector tests for crosstalk inducedeffects, such as pulses, signal speedup and slowdown, in digitalcombinational circuits. These effects are becoming moreprevalent due to short signal switching times and deep submicroncircuitry. These noise effects can propagate through a circuit andcreate a logic error in a latch or at a primary output. We firstpresent a new way for predicting the output waveform producedby an inverter due to a non-square wave pulse at its input. Ourmodeling technique captures such properties as the amplitude ofa pulse and its rise/fall times and the delay through a device. Toexpedite the computation of the response of a logic gate to aninput pulse, we have developed a novel way of modeling suchgates by an equivalent inverter. We have developed a mixed-signaltest generator that incorporates classical PODEM-likestatic values as well as dynamic signals such as transitions andpulses, and timing information such as signal arrival times,rise/fall times, and gate delay. We also present a new analog costfunction that is used to guide the search process. Comparison ofresults with SPICE simulations confirms the accuracy of thisapproach. This paper focuses primarily on crosstalk inducedpulses, but these results have been extended to deal with speedupand slowdown effects.