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The Augmint multiprocessor simulation toolkit for Intel x86 architectures

Published: 07 October 1996 Publication History

Abstract

Most publicly available simulation tools only simulate RISC architectures. These tools cannot capture the instruction mix and memory reference patterns of CISC architectures. We present an overview of Augmint, an execution driven multiprocessor simulation toolkit that fills this gap by supporting Intel x86 architectures. Augmint also supports trace driven simulation for uniprocessors as well as multiprocessors, with minor effort on the part of simulator developers. Augmint runs m4 macro extended C and C++ applications such as those in the SPLASH and SPLASH-2 benchmark suites. Augmint supports a thread based programming model with shared global address space and private stack space. Augmint supports a simulator interface compatible with that of the MINT simulation toolkit for MIPS architectures, thus allowing the reuse of most architecture simulators written for MINT. Augmint simulations run on x8d based uniprocessor systems under Unix or Windows NT. The source code of Augmint is publicly available from http://www.csrd.uiuc.edu/iacoma/augmint.

Cited By

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  • (2011)Exploring the architecture of a stream register-based snoop filterTransactions on high-performance embedded architectures and compilers III10.5555/1980776.1980784(93-114)Online publication date: 1-Jan-2011
  • (2011)Exploring the Architecture of a Stream Register-Based Snoop FilterProceedings of the 2011 conference on Transactions on High-Performance Embedded Architectures and Compilers III - Volume 659010.1007/978-3-642-19448-1_6(93-114)Online publication date: 1-Jan-2011
  • (2010)RunAssertProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1870996(287-290)Online publication date: 8-Mar-2010
  • Show More Cited By

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Information & Contributors

Information

Published In

cover image Guide Proceedings
ICCD '96: Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
October 1996
341 pages
ISBN:0818675543

Publisher

IEEE Computer Society

United States

Publication History

Published: 07 October 1996

Author Tags

  1. Augmint multiprocessor simulation toolkit
  2. C++ applications
  3. CISC architectures
  4. Intel x86 architectures
  5. MINT simulation toolkit
  6. SPLASH-2 benchmark suites
  7. architecture simulators
  8. execution driven multiprocessor simulation toolkit
  9. instruction mix
  10. m4 macro extended C
  11. memory reference patterns
  12. multiprocessing systems
  13. private stack space
  14. publicly available simulation tools
  15. shared global address space
  16. simulator interface
  17. thread based programming model
  18. trace driven simulation
  19. uniprocessors
  20. x8d based uniprocessor systems

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Cited By

View all
  • (2011)Exploring the architecture of a stream register-based snoop filterTransactions on high-performance embedded architectures and compilers III10.5555/1980776.1980784(93-114)Online publication date: 1-Jan-2011
  • (2011)Exploring the Architecture of a Stream Register-Based Snoop FilterProceedings of the 2011 conference on Transactions on High-Performance Embedded Architectures and Compilers III - Volume 659010.1007/978-3-642-19448-1_6(93-114)Online publication date: 1-Jan-2011
  • (2010)RunAssertProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1870996(287-290)Online publication date: 8-Mar-2010
  • (2010)Comprehensive cache performance tuning with a toolsetFuture Generation Computer Systems10.1016/j.future.2009.07.01026:1(167-174)Online publication date: 1-Jan-2010
  • (2009)No cache-coherenceProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1630062(587-592)Online publication date: 26-Jul-2009
  • (2009)NUDAProceedings of the 46th Annual Design Automation Conference10.1145/1629911.1629954(148-153)Online publication date: 26-Jul-2009
  • (2007)Compiled low-level virtual instruction set simulation and profiling for code partitioning and ASIP-synthesis in hardware/software co-designProceedings of the 2007 Summer Computer Simulation Conference10.5555/1357910.1358025(741-748)Online publication date: 16-Jul-2007
  • (2007)Improving the accuracy of snoop filtering using stream registersProceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture10.1145/1327171.1327174(25-32)Online publication date: 16-Sep-2007
  • (2007)Source-Code-Correlated Cache Coherence Characterization of OpenMP BenchmarksIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2007.105818:6(818-834)Online publication date: 1-Jun-2007
  • (2006)Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialitiesProceedings of the 1st international conference on Performance evaluation methodolgies and tools10.1145/1190095.1190174(62-es)Online publication date: 11-Oct-2006
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