article

Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management

Authors:

Diederik Verkest,

Julio Leao Da Silva, Jr.,

Miguel Miranda,

Francky Catthoor,

Hugo De ManAuthors Info & Claims

Journal of VLSI Signal Processing Systems, Volume 21, Issue 3

Pages 185 - 194

Published: 01 July 1999 Publication History

Abstract

MATISSE is a design environment intended for developing systems characterized by a tight interaction between control and data-flow behavior, intensive data storage and transfer, and stringent real-time requirements. Matisse bridges the gap from a system specification, using a concurrent object-oriented language, to an optimized embedded single-chip hardware/software implementation. Matisse supports stepwise exploration and refinement of dynamic memory management, memory architecture exploration, and gradual incorporation of timing constraints before going to traditional tools for hardware synthesis, software compilation, and inter-processor communication synthesis. With this approach, specifications of embedded systems can be written in a high-level programming language using data abstraction. Application of MATISSE on telecom protocol processing systems in the ATM area shows significant improvements in area usage and power consumption.

References

[1]

P. Lippens, J. van Meerbergen, W. Verhaegh, and A. van der Werf, "Allocation of multiport memories for hierarchical data streams," Proceedings of the IEEE International Conference on Computer Aided Design, ICCAD-93, Santa Clara, CA, Nov. 1993.

[2]

P. Chou, R. Ortega, and G. Borriello, "The Chinook hardware/ software co-synthesis system," Proceedings of the 8th International Symposium on System Synthesis, Cannes, France, Sept. 1995.

[3]

F. Balarin, M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, C. Passerone, A. Sangiovanni-Vincentelli, E. Sentovich, K. Suzuki, and B. Tabbara, Hardware-Software Co-Design of Embedded Systems: The Polis Approach, Kluwer Academic Press, June 1997.

Digital Library

[4]

D. Gajski, F. Vahid, S. Narayan, and J. Jong, Specification and Design of Embedded Systems, Prentice Hall, Englewood Cliffs, NJ, 1994.

Digital Library

[5]

D. Harel, "STATEMATE: A working environment for the development of complex reactive systems," IEEE Transactions on Software Engineering, Vol. 16, No. 4, April 1990.

Digital Library

[6]

T. Ben Ismail, K. O'Brien, and A. Jerraya, "Synthesis steps and design models for codesign," IEEE Computer, Special Issue on Rapid Prototyping of Micro-Electronic Systems, pp. 44---52, Feb. 1995.

[7]

P. Schaumont, S. Vernalde, L. Rijnders, M. Engels, and I. Bolsens, "A programming environment for the design of complex high speed ASICS," Proc. Design Automation Conference, San Francisco, June 1998.

[8]

D. Lidsky and J. Rabaey, "Early power exploration---A world wide web application," Proc. Design Automation Conference, Las Vegas, pp. 27---32, June 1996.

[9]

J. Buck, S. Ha, E.A. Lee, and D.G. Messerschmitt, "Ptolemy: A framework for simulating and prototyping heterogeneous systems," Technical report, University of California, Berkeley, Aug. 1992.

[10]

R. Lauwereins, M. Engels, M. Adé, and J.A. Peperstraete, "Grape-II: A system-level prototyping environment for DSP applications," IEEE Computer, pp. 35---43, Feb. 1995.

Digital Library

[11]

K. Danckaert, F. Catthoor, and H. De Man, "System level memory optimization for hardware-software co-design," Proc. IEEE Intnl. Workshop on Hardware/Software Co-design, Braunschweig, Germany, pp. 55---59, March 1997.

[12]

F. Catthoor, S. Wuytack, E. De Greef, F. Franssen, L. Nachtergaele, and H. De Man, "System-level transformations for low power data transfer and storage," in Low Power Design, B. Brodersen and A. Chandrakasan <nt>(Eds.)</nt>, IEEE Press, 1998.

[13]

B. Svantesson, S. Kumar, and A. Hemani, "A methodology and algorithms for efficient interprocess communication synthesis from system descriptions in SDL," International Conference on VLSI Design, Chennai, India, Jan. 1998.

[14]

K. Higuchi and K. Shirakawa, "Innovative system-level design environment based on FORM for transport processing systems," Proc. Design Automation and Test in Europe, Paris, France, pp. 883---890, March 1998.

Digital Library

[15]

J. Leao da Silva Jr., Ch. Ykman-Couvreur, and G. de Jong, "Matisse: A concurrent and object-oriented system specification language," Int. Conf. on VLSI, 1997.

[16]

A. Alles, "ATM in private networking, a tutorial," INTEROP'93, 1993.

[17]

J.-Y. Le Boudec, "The asynchronous transfer mode: A tutorial," Computer Networks and ISDN Systems, Vol. 24, pp. 279---309, 1992.

Digital Library

[18]

Y. Therasse, G. Petit, and M. Delvaux, "VLSI architecture of a SDMS/ATM router," Annales des Telecommunications, Vol. 48, No. 3/4, 1993.

[19]

I. Bolsens, H. De Man, B. Lin, K. Van Rompaey, S. Vercauteren, and D. Verkest. "Hardware-software codesign of telecommunication systems," IEEE Proceedings, Special Issue on Hardware-Software Codesign, Vol. 85, No. 3, pp. 391---418, March 1997.

[20]

CoWare, http://www.coware.com/.

[21]

S. Wuytack, F. Catthoor, and H. De Man, "Transforming set data types to power optimal data structures," IEEE Transactions on Computer-aided Design, Vol. CAD-15, No. 6, pp. 619---629, June 1996.

[22]

G. Attardi and T. Flagea, "A customisable memory management framework," Proceedings USENIX C++ Conference, Cambridge, MA, 1994.

[23]

P.R. Wilson, M. Johnstone, M. Neely, and D. Boles "Dynamic storage allocation: A survey and critical review," Proceedings International Workshop on Memory Management, Kinross, Scotland, UK, Sept. 1995.

[24]

P. Slock, S. Wuytack, F. Catthoor, and G. de Jong, "Fast and extensive system-level memory exploration for ATM applications," Proceedings of the 10th International Symposium on System Synthesis, Antwerp, Belgium, 1997.

[25]

S. Wuytack, F. Catthoor, G. de Jong, B. Lin, and H. De Man, "Flow graph balancing for minimizing the required memory bandwidth," Proceedings of the 9th International Symposium on System Synthesis, pp. 127---132, Nov. 1996.

[26]

M. Miranda, F. Catthoor, M. Janssen, and H. De Man, "ADOPT: Efficient hardware address generation in distributed memory architectures," Proceedings of the 9th International Symposium on System Level Synthesis, Nov. 1996.

Cited By

Andritsopoulos FCharopoulos CDoumenis GKaroubalis FMitsos YPetreas FTheologitou IPerissakis SReisis D(2003)Verification of a Complex SoCProceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 210.5555/1022685.1022954Online publication date: 3-Mar-2003
https://dl.acm.org/doi/10.5555/1022685.1022954
Ykman-Couvreur CLambrecht Jvan der Togt ACatthoor FMueller FChilimbi TDing C(2002)Multi-objective abstract data type refinement for mapping tables in telecom network applicationsProceedings of the 2002 workshop on Memory system performance10.1145/773146.773046(65-75)Online publication date: 16-Jun-2002
https://dl.acm.org/doi/10.1145/773146.773046
Ykman-Couvreur CLambrecht Jvan der Togt ACatthoor F(2002)Multi-objective abstract data type refinement for mapping tables in telecom network applicationsACM SIGPLAN Notices10.1145/773039.77304638:2 supplement(65-75)Online publication date: 16-Jun-2002
https://dl.acm.org/doi/10.1145/773039.773046
Show More Cited By

Index Terms

Matisse: A System-on-Chip Design Methodology Emphasizing Dynamic Memory Management

Recommendations

MATISSE 2.0: A Large-Scale Multi-agent Simulation System for Agent-Based ITS
WI-IAT '15: Proceedings of the 2015 IEEE / WIC / ACM International Conference on Web Intelligence and Intelligent Agent Technology (WI-IAT) - Volume 01

In this paper we present MATISSE 2.0, a microscopic multi-agent based simulation system for the specification and execution of simulation scenarios for Agent-based intelligent Transportation Systems (ATS). In MATISSE, each smart traffic element (e.g., ...
Matisse: An Architectural Design Tool for Commodity ICs

As today's market conditions require design organizations to create products in shorter time, there is also a significant change in the product mix due to fast growing markets such as wireless, automotive, multimedia and network applications. The nature ...
SystemCoDesigner—an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications

With increasing design complexity, the gap from ESL (Electronic System Level) design to RTL synthesis becomes more and more crucial to many industrial projects. Although several behavioral synthesis tools exist to automatically generate synthesizable ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image Journal of VLSI Signal Processing Systems

Journal of VLSI Signal Processing Systems Volume 21, Issue 3

Special issue on system level design

July 1999

105 pages

ISSN:0922-5773

Editors:
S. Y. Kung
Princeton Univ., Princeton, NJ
,
Asim Smailagic,
Hugo De Man

Issue’s Table of Contents

Copyright © Copyright © 1999 Kluwer Academic Publishers.

Publisher

Kluwer Academic Publishers

United States

Publication History

Published: 01 July 1999

Qualifiers

Article

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

6
Total Citations
View Citations
0
Total Downloads

Downloads (Last 12 months)0
Downloads (Last 6 weeks)0

Reflects downloads up to 21 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

Andritsopoulos FCharopoulos CDoumenis GKaroubalis FMitsos YPetreas FTheologitou IPerissakis SReisis D(2003)Verification of a Complex SoCProceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 210.5555/1022685.1022954Online publication date: 3-Mar-2003
https://dl.acm.org/doi/10.5555/1022685.1022954
Ykman-Couvreur CLambrecht Jvan der Togt ACatthoor FMueller FChilimbi TDing C(2002)Multi-objective abstract data type refinement for mapping tables in telecom network applicationsProceedings of the 2002 workshop on Memory system performance10.1145/773146.773046(65-75)Online publication date: 16-Jun-2002
https://dl.acm.org/doi/10.1145/773146.773046
Ykman-Couvreur CLambrecht Jvan der Togt ACatthoor F(2002)Multi-objective abstract data type refinement for mapping tables in telecom network applicationsACM SIGPLAN Notices10.1145/773039.77304638:2 supplement(65-75)Online publication date: 16-Jun-2002
https://dl.acm.org/doi/10.1145/773039.773046
Parameswaran S(2001)Code placement in hardware/software co-synthesis to improve performance and reduce costProceedings of the conference on Design, automation and test in Europe10.5555/367072.367836(626-632)Online publication date: 13-Mar-2001
https://dl.acm.org/doi/10.5555/367072.367836
Verkest DKunkel JSchirrmeister FBolsens I(2000)System level design using C++Proceedings of the conference on Design, automation and test in Europe10.1145/343647.343709(74-83)Online publication date: 1-Jan-2000
https://dl.acm.org/doi/10.1145/343647.343709
Desmet DVerkest DDe Man HDe Micheli G(2000)Operating system based software generation for systems-on-chipProceedings of the 37th Annual Design Automation Conference10.1145/337292.337509(396-401)Online publication date: 1-Jun-2000
https://dl.acm.org/doi/10.1145/337292.337509

View Options

View options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

Media

Figures

Other

Tables

View Issue’s Table of Contents