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Cray cascade: a scalable HPC system based on a Dragonfly network

Published: 10 November 2012 Publication History

Abstract

Higher global bandwidth requirement for many applications and lower network cost have motivated the use of the Dragonfly network topology for high performance computing systems. In this paper we present the architecture of the Cray Cascade system, a distributed memory system based on the Dragonfly [1] network topology. We describe the structure of the system, its Dragonfly network and the routing algorithms. We describe a set of advanced features supporting both mainstream high performance computing applications and emerging global address space programing models.
We present a combination of performance results from prototype systems and simulation data for large systems. We demonstrate the value of the Dragonfly topology and the benefits obtained through extensive use of adaptive routing.

References

[1]
J. Kim, W. J. Dally, S. Scott and D. Abts, "Technology-Driven, Highly-Scalable Dragonfly Topology", Proc. of the International Symposium on Computer Architecture (ISCA), pages 77--88.
[2]
R. Brightwell, K. Predretti, K. Underwood, and T. Hudson. "Seastar Interconnect: Balanced Bandwidth for ScalablePerformance", Micro, IEEE, 26(3):41--57, 2006
[3]
Bob Alverson, Duncan Roweth and Larry Kaplan, Cray Inc. "The Gemini System Interconnect", High-Performance Interconnects Symposium, 83--87 (2010).
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C. Leisserson, "Fat-trees: Universal networks for hardware efficient supercomputing", IEEE Transactions on computer, C-34(10):892--901, October 1985.
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S. Scott, D. Abts, J. Kim, and W. J. Dally. "The BlackWidow High-radix Clos Network", Proc. of the International Symposium on Computer Architecture (ISCA), pages 16--28, 2006.
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L. G. Valiant, "A scheme for fast parallel communication", SIAM Journal on Computing, 11(2):350--361, 1982.
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H. Pritchard, I. Gorodetsky, and D. Buntinas, "A uGNI based MPICH2 Nemesis Network Module for the Cray XE", Proceedings of the 18th European MPI Users' Group Conference on Recent Advances in the Message Passing Interface, EuroMPI'11, pages 110--119, Berlin, Heidelberg, 2011. Springer-Verlag.
[8]
Dennis Abts, Abdulla Bataineh, Steve Scott, Greg Faanes, Jim Schwarzmeier, Eric Lundberg, Tim Johnson, Mike Bye, Gerald Schwoerer, "The Cray BlackWidow: A Highly Scalable Vector Multiprocessor", SC '07: Proceedings of the 2007 ACM/IEEE conference on Supercomputing, pages 1--12.
[9]
Cray Research, Inc.: SHMEM Technical Note for C, SG-2516 2.3. (1994).
[10]
Dong Chen, Eisley, N. A.; Heidelberger, P.; Senger, R. M.; Sugawara, Y.; Kumar, S.; Salapura, V.; Satterfield, D.; Steinmacher-Burow, B.; Parker, J., "The IBM Blue Gene/Q Interconnection Fabric", IEEE Micro, Jan.-Feb. 2012, Volume: 32, Issue: 1, pg 32.
[11]
Takumi Maruyama "SPARC64(TM) VIIIfx: Fujitsu's New Generation Octo Core Processor for PETA Scale computing",. Proceedings of Hot Chips 21. IEEE Computer Society, 2009.
[12]
B. Arimilli, R. Arimilli, V. Chung, S. Clark, W. Denzel, B. Drerup, T. Hoefler, J. Joyner, J. Lewis, J. Li, N. Ni and R. Rajamony, "The PERCS High-Performance Interconnect", Proceedings of 18th Symposium on High-Performance Interconnects (Hot Interconnects 2010), IEEE, Aug. 2010).

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cover image ACM Conferences
SC '12: Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
November 2012
1161 pages
ISBN:9781467308045

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IEEE Computer Society Press

Washington, DC, United States

Publication History

Published: 10 November 2012

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Author Tags

  1. interconnect technologies
  2. parallel and scalable system architectures
  3. performance evaluation and measurement of real systems

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SC '12 Paper Acceptance Rate 100 of 461 submissions, 22%;
Overall Acceptance Rate 1,516 of 6,373 submissions, 24%

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  • (2023)The Graph Database Interface: Scaling Online Transactional and Analytical Graph Workloads to Hundreds of Thousands of CoresProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3581784.3607068(1-18)Online publication date: 12-Nov-2023
  • (2023)High-Performance and Programmable Attentional Graph Neural Networks with Global Tensor FormulationsProceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis10.1145/3581784.3607067(1-16)Online publication date: 12-Nov-2023
  • (2023)A Study of Simulating Heterogeneous Workloads on Large-scale Interconnect NetworkProceedings of the 2023 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation10.1145/3573900.3593636(58-59)Online publication date: 21-Jun-2023
  • (2020)Measuring congestion in high-performance datacenter interconnectsProceedings of the 17th Usenix Conference on Networked Systems Design and Implementation10.5555/3388242.3388246(37-58)Online publication date: 25-Feb-2020
  • (2020)Global link arrangement for practical DragonflyProceedings of the 34th ACM International Conference on Supercomputing10.1145/3392717.3392756(1-11)Online publication date: 29-Jun-2020
  • (2019)Modeling Universal Globally Adaptive Load-Balanced RoutingACM Transactions on Parallel Computing10.1145/33496206:2(1-23)Online publication date: 30-Aug-2019
  • (2019)Design Exploration of Multi-tier Interconnection Networks for Exascale SystemsProceedings of the 48th International Conference on Parallel Processing10.1145/3337821.3337903(1-10)Online publication date: 5-Aug-2019
  • (2019)DeepHiRProceedings of the ACM International Conference on Supercomputing10.1145/3330345.3330381(403-413)Online publication date: 26-Jun-2019
  • (2019)Modeling and Analysis of Application Interference on Dragonfly+Proceedings of the 2019 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation10.1145/3316480.3325517(161-172)Online publication date: 29-May-2019
  • (2019)Analyzing Cost-Performance Tradeoffs of HPC Network Designs under Different Constraints using SimulationsProceedings of the 2019 ACM SIGSIM Conference on Principles of Advanced Discrete Simulation10.1145/3316480.3325516(1-12)Online publication date: 29-May-2019
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