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View all- Cao XXiao LLi JZhang RLiu SWang J(2019)A Layout-Based Soft Error Vulnerability Estimation Approach for Combinational Circuits Considering Single Event Multiple Transients (SEMTs)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2018.283442538:6(1109-1122)Online publication date: 1-Jun-2019
- Ma JWang Y(2017)Characterization of stack behavior under soft errorsProceedings of the Conference on Design, Automation & Test in Europe10.5555/3130379.3130738(1538-1543)Online publication date: 27-Mar-2017
- Cheng EMirkhani SSzafaryn LCher CCho HSkadron KStan MLilja KAbraham JBose PMitra S(2016)CLEARProceedings of the 53rd Annual Design Automation Conference10.1145/2897937.2897996(1-6)Online publication date: 5-Jun-2016