Browse Theses

Graph coloring algorithms have been shown to be an efficient and effective means of performing global register allocation. The power and appeal of these algorithms lie in their strong coloring heuristics and their ability to abstract away seemingly disparate allocation problems such as data-flow constraints, conforming to compiler calling conventions and restrictions due to machine specific details. However, even optimal graph coloring algorithms cannot color every graph. For uncolorable graphs, some live ranges must be spilled to memory to make room for others. The amount of spill code generated and its location can greatly affect a program's performance, so great care should be taken to minimize the amount of spill code inserted.Previous spill code minimization techniques by Chaitin et al. at IBM Yorktown and Bernstein et al. at IBM Haifa have been limited to minimizing spill code on a basic block level. This thesis presents several new global techniques which can be used in conjunction with the heuristics developed by Chaitin et al. and Bernstein et al. to further minimize the amount of spill code produced. These techniques are based on our new definition of interference regions. Interference regions specific the portion of the program where two interfering live ranges are live simultaneously. Inserting spill code for one of the live ranges in their interference region removes their interference since they are no longer live simultaneously. In addition, the implementations of our various techniques are presented and evaluated in detail. Finally, for the benchmarks used, results show that our techniques can reduce dynamically executed spill code by up to 75% and improve execution time by over 15%.