This paper proposes an analytical modeling of power consumption in CMOS gates which is based on timing-only models. The proposed model is refined for the short circuit power dissipation as a function of input transition times, power supply voltage and ...
In this paper, we present a new technique which indirectly separates and extracts the total short-circuit power consumption of digital CMOS circuits. We avoid a direct encounter with the complex behavior of the short-circuit currents. Instead, we ...
One major challenge in low-power technology is how to reduce overall power dissipation of a given subsystem without impacting its performance. In this paper we present a technique that can be applied to the nonspeed-critical nets in a circuit in order ...
IEEE Press
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