Design of POP-11 (PDP-11 on programmable chip)
Pages 571 - 572
Abstract
We developed POP-11/40 which is PDP-11/40 compatible processor, implemented it on an FPGA. We also designed ANSI C development tools an FPGA base-board which has SRAM, Serial and IDE interface, and run UNIX V6 on this system. In this paper, we describe a feature of a design of POP-11/40, base-board and UNIX V6.
References
[1]
http://www.tuhs.org/Archive/Caldera-license.pdf, 2002
[2]
John Lions, "Lions' Commentary on UNIX", Peer-to-Pear Communications, 1990
[3]
N. Shimizu, "The Design of Sfl2vl: SFL to Verilog Converter Based on a LR-parser", SASIMI 2003
[4]
http://www.cadsoft.de/
[5]
http://shimizu-lab.dt.u-tokai.ac.jp/pop11.html
[6]
http://www.nilsenelektronikk.no/
[7]
"pdp11/40 processor handbook", DEC, 1972
[8]
"pdp11/45 processor handbook", DEC, 1972
[9]
"pdp11 peripherals and interfacing handbook", DEC, 1972
Information & Contributors
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- IPSJ: Information Processing Society of Japan
- IEEE Circuits and Systems Society
- SIGDA: ACM Special Interest Group on Design Automation
- IEICE: Institute of Electronics, Information and Communication Engineers
Publisher
IEEE Press
Publication History
Published: 27 January 2004
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ASPDAC04
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- IPSJ
- SIGDA
- IEICE
ASPDAC04: Asia and South Pacific Design Automation Conference 2004
January 27 - 30, 2004
Yokohama, Japan
Acceptance Rates
Overall Acceptance Rate 466 of 1,454 submissions, 32%
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