research-article

Clock tree optimization for electromagnetic compatibility (EMC)

Authors:

Matthew R. GuthausAuthors Info & Claims

ASPDAC '11: Proceedings of the 16th Asia and South Pacific Design Automation Conference

Pages 184 - 189

Published: 25 January 2011 Publication History

Abstract

Electromagnetic Interference (EMI) generated by electronic systems is increasing with operating frequency and shrinking process technologies. The clock distribution network is one of the major causes of on-chip EMI. In this paper, we discuss the EMI problem in clock tree design. Spectrum analysis shows that slew rate of clock signal is the main parameter determining the high-frequency spectral content distribution. This is the first work to consider maximum and minimum buffer slew rates in clock tree synthesis to reduce EMI. In this paper, we propose a dynamic programming algorithm to optimize the clock tree considering both traditional metrics and Electromagnetic Compatibility (EMC). Our experimental results show that slew can be controlled in a feasible range and high-frequency spectrum contents can be reduced without sacrificing the traditional metrics such as power and skew. With the efficient optimization and pruning method, the biggest benchmark is able to complete in four minutes.

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Cited By

Gorman DPossignolo RRenau J(2019)EMI Architectural Model and Core HoppingProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358289(899-910)Online publication date: 12-Oct-2019
https://dl.acm.org/doi/10.1145/3352460.3358289
Gorman DGuthaus MRenau JHunter HMoreno JEmer JSanchez D(2017)Architectural opportunities for novel dynamic EMI shifting (DEMIS)Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3123939.3123973(774-785)Online publication date: 14-Oct-2017
https://dl.acm.org/doi/10.1145/3123939.3123973

Index Terms

Clock tree optimization for electromagnetic compatibility (EMC)
1. Applied computing
  1. Physical sciences and engineering
    1. Electronics
2. Hardware
  1. Robustness

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Information & Contributors

Information

Published In

cover image ACM Conferences

ASPDAC '11: Proceedings of the 16th Asia and South Pacific Design Automation Conference

January 2011

841 pages

ISBN:9781424475162

Sponsors

IEEE
IPSJ
SIGDA: ACM Special Interest Group on Design Automation
IEICE ESS: Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IEICE

Publisher

IEEE Press

Publication History

Published: 25 January 2011

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Research-article

Conference

ASPDAC '11

Sponsor:

SIGDA
IEICE ESS

ASPDAC '11: 16th Asia and South Pacific Design Automation Conference

January 25 - 28, 2011

Yokohama, Japan

Acceptance Rates

Overall Acceptance Rate 466 of 1,454 submissions, 32%

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ASPDAC '25

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30th Asia and South Pacific Design Automation Conference

January 20 - 23, 2025

Tokyo , Japan

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Citations

Cited By

Gorman DPossignolo RRenau J(2019)EMI Architectural Model and Core HoppingProceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3352460.3358289(899-910)Online publication date: 12-Oct-2019
https://dl.acm.org/doi/10.1145/3352460.3358289
Gorman DGuthaus MRenau JHunter HMoreno JEmer JSanchez D(2017)Architectural opportunities for novel dynamic EMI shifting (DEMIS)Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3123939.3123973(774-785)Online publication date: 14-Oct-2017
https://dl.acm.org/doi/10.1145/3123939.3123973

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