Article

Customizing the datapath and ISA of soft VLIW processors

Authors:

Mazen A. R. Saghir,

Mohamad El-Majzoub,

Patrick AklAuthors Info & Claims

HiPEAC'07: Proceedings of the 2nd international conference on High performance embedded architectures and compilers

Pages 276 - 290

Published: 28 January 2007 Publication History

Abstract

In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-density FPGA. In addition to describing our processor, we describe a number of microarchitectural optimizations we used to reduce the area of the datapath. We also describe the tools we developed to customize, generate, and program our processor. Our experimental results show that datapath and instruction set customization achieve high levels of performance, and that using on-chip resources and implementing microarchitectural optimizations like selective data forwarding help keep FPGA resource utilization in check.

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Cited By

Wu IShann JHsu WChung C(2014)Extended Instruction Exploration for Multiple-Issue ArchitecturesACM Transactions on Embedded Computing Systems10.1145/256003913:4(1-28)Online publication date: 10-Mar-2014
https://dl.acm.org/doi/10.1145/2560039
Lam SSrikanthan TClarke C(2014)Rapid evaluation of custom instruction selection approaches with FPGA estimationACM Transactions on Embedded Computing Systems10.1145/256001413:4(1-29)Online publication date: 10-Mar-2014
https://dl.acm.org/doi/10.1145/2560014
Anjam FKong QSeedorf RWong S(2012)A run-time task migration scheme for an adjustable issue-slots multi-core processorProceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications10.1007/978-3-642-28365-9_9(102-113)Online publication date: 19-Mar-2012
https://dl.acm.org/doi/10.1007/978-3-642-28365-9_9
Show More Cited By

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Information & Contributors

Information

Published In

cover image Guide Proceedings

HiPEAC'07: Proceedings of the 2nd international conference on High performance embedded architectures and compilers

January 2007

306 pages

ISBN:9783540693376

Editors:
Koen De Bosschere
Ghent University, Department ELIS, Ghent, Belgium
,
David Kaeli
Dana Research Center, Northeastern University, Boston, MA
,
Per Stenström
Chalmers University of Technology, Department of Computer Science and Engineering, Gothenburg, Sweden
,
David Whalley
Florida State University, Computer Science Department, Tallahassee, FL
,
Theo Ungerer
Universität Augsburg, Institut für Informatik, Lehrstuhl für Systemnahe Informatik und Kommunikationssysteme, Augsburg, Germany

Publisher

Springer-Verlag

Berlin, Heidelberg

Publication History

Published: 28 January 2007

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Cited By

Wu IShann JHsu WChung C(2014)Extended Instruction Exploration for Multiple-Issue ArchitecturesACM Transactions on Embedded Computing Systems10.1145/256003913:4(1-28)Online publication date: 10-Mar-2014
https://dl.acm.org/doi/10.1145/2560039
Lam SSrikanthan TClarke C(2014)Rapid evaluation of custom instruction selection approaches with FPGA estimationACM Transactions on Embedded Computing Systems10.1145/256001413:4(1-29)Online publication date: 10-Mar-2014
https://dl.acm.org/doi/10.1145/2560014
Anjam FKong QSeedorf RWong S(2012)A run-time task migration scheme for an adjustable issue-slots multi-core processorProceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications10.1007/978-3-642-28365-9_9(102-113)Online publication date: 19-Mar-2012
https://dl.acm.org/doi/10.1007/978-3-642-28365-9_9
Wong SAnjam FNadeem FDe Micheli GAl-Hashimi BMueller WMacii E(2010)Dynamically reconfigurable register file for a softcore VLIW processorProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871162(969-972)Online publication date: 8-Mar-2010
https://dl.acm.org/doi/10.5555/1870926.1871162
Saghir MNaous R(2007)A configurable multi-ported register file architecture for soft processor coresProceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications10.5555/1764631.1764634(14-25)Online publication date: 27-Mar-2007
https://dl.acm.org/doi/10.5555/1764631.1764634

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