research-article

Deterministic analog circuit placement using hierarchically bounded enumeration and enhanced shape functions

Authors:

Martin Strasser,

Ulf Schlichtmann,

Frank M. JohannesAuthors Info & Claims

ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design

Pages 306 - 313

Published: 10 November 2008 Publication History

Abstract

The analog placement algorithm Plantage, presented in this paper, generates placements for analog circuits with comprehensive placement constraints. Plantage is based on a hierarchically bounded enumeration of basic building blocks, using B*-trees. The practically relevant solution space is thereby enumerated quasi-complete. The sets of possible placements of the basic building blocks are represented and combined in a new efficient way, using enhanced shape functions. The result of Plantage is the Pareto front of placements with respect to different aspect ratios. The whole approach is deterministic, in contrast to existing analog placement algorithms.

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Cited By

Xu BLi SPui CLiu DShen LLin YSun NPan DBustany ISwartz W(2019)Device Layer-Aware Analytical Placement for Analog CircuitsProceedings of the 2019 International Symposium on Physical Design10.1145/3299902.3309751(19-26)Online publication date: 4-Apr-2019
https://dl.acm.org/doi/10.1145/3299902.3309751
Xu BBasaran BSu MPan DChu CBustany I(2018)Analog Placement Constraint Extraction and Exploration with the Application to Layout RetargetingProceedings of the 2018 International Symposium on Physical Design10.1145/3177540.3178245(98-105)Online publication date: 25-Mar-2018
https://dl.acm.org/doi/10.1145/3177540.3178245
Xu BLi SXu XSun NPan DOzdal MChu C(2017)Hierarchical and Analytical Placement Techniques for High-Performance Analog CircuitsProceedings of the 2017 ACM on International Symposium on Physical Design10.1145/3036669.3036678(55-62)Online publication date: 19-Mar-2017
https://dl.acm.org/doi/10.1145/3036669.3036678
Show More Cited By

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Published In

cover image ACM Conferences

ICCAD '08: Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design

November 2008

855 pages

ISBN:9781424428205

General Chair:
Sani R. Nassif
IBM Austin Research Lab, Austin Texas
,
Program Chair:
Jaijeet Roychowdhury
Univ. of Minnesota, Minneapolis, MN

Sponsors

SIGDA: ACM Special Interest Group on Design Automation
IEEE Council on Electronic Design Automation (CEDA)
IEEE CASS/CANDE

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IEEE Press

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Published: 10 November 2008

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ASE08

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SIGDA

ASE08: The International Conference on Computer-Aided Design

November 10 - 13, 2008

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Xu BLi SPui CLiu DShen LLin YSun NPan DBustany ISwartz W(2019)Device Layer-Aware Analytical Placement for Analog CircuitsProceedings of the 2019 International Symposium on Physical Design10.1145/3299902.3309751(19-26)Online publication date: 4-Apr-2019
https://dl.acm.org/doi/10.1145/3299902.3309751
Xu BBasaran BSu MPan DChu CBustany I(2018)Analog Placement Constraint Extraction and Exploration with the Application to Layout RetargetingProceedings of the 2018 International Symposium on Physical Design10.1145/3177540.3178245(98-105)Online publication date: 25-Mar-2018
https://dl.acm.org/doi/10.1145/3177540.3178245
Xu BLi SXu XSun NPan DOzdal MChu C(2017)Hierarchical and Analytical Placement Techniques for High-Performance Analog CircuitsProceedings of the 2017 ACM on International Symposium on Physical Design10.1145/3036669.3036678(55-62)Online publication date: 19-Mar-2017
https://dl.acm.org/doi/10.1145/3036669.3036678
Saif SDessouky MEl-Kharashi MAbbas HNassar SFanucci LTeich J(2016)Pareto front analog layout placement using satisfiability modulo theoriesProceedings of the 2016 Conference on Design, Automation & Test in Europe10.5555/2971808.2972136(1411-1416)Online publication date: 14-Mar-2016
https://dl.acm.org/doi/10.5555/2971808.2972136
Schlichtmann UDavoodi AYoung E(2015)Beyond GORDIAN and KraftwerkProceedings of the 2015 Symposium on International Symposium on Physical Design10.1145/2717764.2723571(133-140)Online publication date: 29-Mar-2015
https://dl.acm.org/doi/10.1145/2717764.2723571
Unutulmaz ADündar GFernández FMacii E(2013)Area optimization on fixed analog floorplans using convex area functionsProceedings of the Conference on Design, Automation and Test in Europe10.5555/2485288.2485722(1843-1848)Online publication date: 18-Mar-2013
https://dl.acm.org/doi/10.5555/2485288.2485722
Lin CLee CLin JChang SHu A(2012)Analytical-based approach for capacitor placement with gradient error compensation and device correlation enhancement in analog integrated circuitsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429520(635-642)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429520
Wu PLin MChen YChou BChen THo TLiu BHu A(2012)Performance-driven analog placement considering monotonic current pathsProceedings of the International Conference on Computer-Aided Design10.1145/2429384.2429516(613-619)Online publication date: 5-Nov-2012
https://dl.acm.org/doi/10.1145/2429384.2429516
Martins RLourenço NHorta NMoore J(2012)LAYGEN IIProceedings of the 14th annual conference on Genetic and evolutionary computation10.1145/2330163.2330319(1127-1134)Online publication date: 7-Jul-2012
https://dl.acm.org/doi/10.1145/2330163.2330319
Lin CLu CLin JChang SHu JKoh C(2012)Routability-driven placement algorithm for analog integrated circuitsProceedings of the 2012 ACM international symposium on International Symposium on Physical Design10.1145/2160916.2160934(71-78)Online publication date: 25-Mar-2012
https://dl.acm.org/doi/10.1145/2160916.2160934
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