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A large-current-output boosted voltage generator with non-overlapping clock control for sub-1-V memory applications

Published: 27 January 2004 Publication History

Abstract

A new CMOS large-current-output positive pump is proposed and compared with the conventional pump in this paper. In this new pump scheme, two auxiliary pumps which are driven by non-overlapping clocks control the transfer and precharge switches, respectively, increasing the 'ON' conductance of the transfer switches very much at sub-1-V-VDD range. The output current improvement of this new pump reaches to 1.6 times larger than the conventional pump with an area penalty less than 10%. This new pump was fabricated in 0.35-μm n-well process technology and its effectiveness is firstly verified experimentally in this paper.

References

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T. B. Cho and P. R. Gray, "A 10-bit, 20 MS/s, 35 mW pipeline A/D converter," in IEEE Custom Integrated Circuit Conference, 1994, pp. 499--502
[2]
P. Favrat, P. Deval, and M. Declercq, "A high-efficiency CMOS voltage doubler," IEEE Journal of Solid-State Circuits, vol. 33, no. 3, pp. 410--416, March 1998.
[3]
Y. Kim, J. Nam, S. Lee, H. Park, J. Choi, C. Park, S. Ahn, and J. Chung, "Two-phase boosted voltage generator for low-voltage giga-bit DRAMs," IEICE Trans. Electron., vol. E83-C, no. 2, pp. 266--269, Feb. 2000.
[4]
K. Min and J. Chung, "A fast pump-down VBB generator for sub-1.5-V DRAMs,", IEEE Journal of Solid-State Circuits, vol. 36, no. 7, pp. 1154--1157, July 2001.

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cover image ACM Conferences
ASP-DAC '04: Proceedings of the 2004 Asia and South Pacific Design Automation Conference
January 2004
957 pages
ISBN:0780381750

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IEEE Press

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Published: 27 January 2004

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