Article

Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice

Authors:

Richard A. Hankins,

Murali Annavaram,

Hubert Nueckel,

John P. ShenAuthors Info & Claims

MICRO 36: Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture

Page 151

Published: 03 December 2003 Publication History

Abstract

On-ine Transaction Processing (OLTP) workloads arecrucial benchmarks for the design and analysis of serverprocessors. Typical cached configurations used byresearchers to simulate OLTP workloads are orders ofmagnitude smaller than the fully scaled configurationsused by OEM vendors to achieve world-record transactionprocessing throughput. The objective of this study is todiscover the underlying relationships that characterizeOLTP performance over a wide range of configurations.To this end, we have derived the "iron law" of databaseperformance. Using our iron law, we show that both theaverage instructions executed per transaction (IPX) andthe average cycles per instruction (CPI) are critical to thetransaction-throughput performance. We use an extensive,empirical examination of an Oracle® based commercialOLTP workload on an Intel® XeonTM multiprocessorsystem to characterize the scaling behavior of both theIPX and the CPI. We demonstrate that across a widerange of configurations the IPX and CPI behavior followspredictable trends, which can be accurately characterizedby simple linear or piece-wise linear approximations.Based on our data,we propose a method for selecting aminimal, representative workload configuration fromwhich behaviors of much larger OLTP configurations canbe accurately extrapolated.

References

[1]

{1} A. Ailamaki, D. DeWitt, M. Hill, and D. Wood. DBMSs on a Modern Processor: Where Does Time Go? In Proceedings of the 25th International Conference on Very Large Data Bases, pages 266- 277, September 1999.

Digital Library

[2]

{2} A.R. Alameldeen and D.A. Wood. Variability in Architectural Simulations of Multithreaded Workloads, In Proceedings of the 9th International Symposium on High-Performance Computer Architecture, pages 7-18, February 2003.

Digital Library

[3]

{3} M. Annavaram, T. Diep and J.P. Shen. Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors. In Proceedings of the International Conference on Computer Design, pages 242-248, January 2001.

Digital Library

[4]

{4} T. Diep, M. Annavaram, H. Nueckel, B. Hirano, and J.P. Shen. Analyzing Performance Characteristics of OLTP Cached Workloads by Linear Interpolation. In Proceedings of the 6th Workshop on Computer Architecture Evaluation using Commercial Workloads, pages 51-59, February 2003.

[5]

{5} L.A. Barroso, K. Gharachorloo, and E. Bugnion. Memory System Characterization of Commercial Workloads. In Proceedings of the 25th International Symposium on Computer Architecture, pages 3-14, June 1998.

Digital Library

[6]

{6} L.A. Barroso, K. Gharachorloo, R. McNamara, A. Nowatzyk, S. Qadeer, B. Sano, S. Smith, R. Stets, and B. Verghese. Piranha: A Scalable Architecture Based on Single-Chip Multiprocessing. In Proceedings of the 27th International Symposium on Computer Architecture, pages 282-293, June 2000.

Digital Library

[7]

{7} L.A. Barroso, K. Gharachorloo, A. Nowatzyk, and B. Verghese. Impact of Chip-Level Integration on Performance of OLTP Workloads. In Proceedings of the 6th International Symposium on High-Performance Computer Architecture, pages 3-14, January 2000.

[8]

{8} Z. Cvetanovic and D. Bhandarkar. Characterization of Alpha-Axp Performance using TP and SPEC Workloads. In Proceedings of the 21st International Symposium on Computer Architecture, pages 60-70, April 1994.

Digital Library

[9]

{9} J. Lo, L.A. Barroso, S. Eggers, K. Gharachorloo, H. Levy, and S. Parekh. An Analysis of Database Workload Performance on Simultaneous Multithreaded Processors. In Proceedings of the 25th Annual International Symposium on Computer Architecture, pages 39-50, June 1998.

Digital Library

[10]

{10} M. Franklin, W.P. Alexander, R. Jauhari, A.M.G. Maynard, B.R. Olszewski. Commercial Workload Performance in the IBM Power2 Risc System/6000 Processor. IBM J. of Research and Development, 38(5):555-561, 1994.

Digital Library

[11]

{11} J. Kahle. Power4: A Dual-CPU Processor Chip. Microprocessor Forum '99, October 1999.

[12]

{12} K. Keeton, D.A. Patterson, Y.Q. He, R.C. Raphael, and W.E. Baker. Performance Characterization of a Quad Pentium Pro SMP Using OLTP Workloads. In Proceedings of the 25th International Symposium on Computer Architecture, pages 15-26, June 1998.

Digital Library

[13]

{13} J. Shen and M. Lipasti, Modern Processor Design: Fundamentals of Superscalar Processors, McGraw Hill, 2002.

[14]

{14} The IA-32 Intel® Architecture Software Developer's Manual, Volume 3: System Programming Guide.

[15]

{15} The Intel VTune Performance Analyzer. http://www.intel.com/software/products/vtune/.

[16]

{16} The Intel Xeon Processor MP Product Overview. http://developer.intel.com/design/Xeon/xeonmp/prodb ref/.

[17]

{17} K. Olukotun, B.A. Nayfeh, L. Hammond, K. Wilson and K. Chang. The Case for a Single-Chip Multiprocessor. In Proceedings of the 7th International Symposium on Architectural Support for Parallel Languages and Operating Systems, pages 2- 11, Oct. 1996.

Digital Library

[18]

{18} P. Ranganathan and K. Gharachorloo and S.V. Adve and L.A. Barroso. Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors. In Proceedings of the 8th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 307-318, October 1998.

Digital Library

[19]

{19} M. Rosenblum, E. Bugnion, S. Herrod, E. Witchel, and A. Gupta. The Impact of Architectural Trends on Operating System Performance. In Proceedings of the 15th Symposium on Operating Systems Principles, pages 285-298, December 1995.

Digital Library

[20]

{20} Standard Performance Council. The SPEC95 CPU Benchmark Suite. http://www.spec.org/cpu2000.

[21]

{21} K. Keeton, D.A. Patterson. The impact of Hardware and Software Configuration on Computer Architecture Performance Evaluation. In the first Workshop on Computer Architecture Evaluation using Commercial Workloads.

[22]

{22} R. Hankins, M. Annavaram, T. Diep, H. Eri, B. Hirano, H. Nueckel, and J.P. Shen. Comparing and Contrasting OLTP Workload Scaling on IA32 and IPF. October 2003. http://www.intel.com/research.

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cover image ACM Conferences

MICRO 36: Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture

December 2003

412 pages

ISBN:076952043X

Copyright © Copyright (c) 2003 Institute of Electrical and Electronics Engineers, Inc. All rights reserved.

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SIGMICRO: ACM Special Interest Group on Microarchitectural Research and Processing

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IEEE Computer Society

United States

Publication History

Published: 03 December 2003

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MICRO-36

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MICRO-36: The 36th Annual International Symposium on Microarchitecture

December 3 - 5, 2003

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MICRO 36 Paper Acceptance Rate 35 of 134 submissions, 26%;

Overall Acceptance Rate 484 of 2,242 submissions, 22%

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Roh HPark SKim SShin MLee S(2011)B+-tree index optimization by exploiting internal parallelism of flash-based solid state drivesProceedings of the VLDB Endowment10.14778/2095686.20956885:4(286-297)Online publication date: 1-Dec-2011
https://dl.acm.org/doi/10.14778/2095686.2095688
Tickoo OIyer RIllikkal RNewell D(2010)Modeling virtual machine performanceACM SIGMETRICS Performance Evaluation Review10.1145/1710115.171012637:3(55-60)Online publication date: 21-Jan-2010
https://dl.acm.org/doi/10.1145/1710115.1710126
Liao SHung TNguyen DChou CTu CZhou HPinfold W(2009)Machine learning-based prefetch optimization for data center applicationsProceedings of the Conference on High Performance Computing Networking, Storage and Analysis10.1145/1654059.1654116(1-10)Online publication date: 14-Nov-2009
https://dl.acm.org/doi/10.1145/1654059.1654116
Somogyi SWenisch TAilamaki AFalsafi B(2009)Spatio-temporal memory streamingACM SIGARCH Computer Architecture News10.1145/1555815.155576637:3(69-80)Online publication date: 20-Jun-2009
https://dl.acm.org/doi/10.1145/1555815.1555766
Somogyi SWenisch TAilamaki AFalsafi BKeckler SBarroso L(2009)Spatio-temporal memory streamingProceedings of the 36th annual international symposium on Computer architecture10.1145/1555754.1555766(69-80)Online publication date: 20-Jun-2009
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Chung EPapamichael MNurvitadhi EHoe JMai KFalsafi B(2009)ProtoFlexACM Transactions on Reconfigurable Technology and Systems10.1145/1534916.15349252:2(1-32)Online publication date: 1-Jun-2009
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Zhai BDreslinski RBlaauw DMudge TSylvester DMarculescu DRaghunathan AKeshavarzi ANarayanan V(2007)Energy efficient near-threshold chip multi-processingProceedings of the 2007 international symposium on Low power electronics and design10.1145/1283780.1283789(32-37)Online publication date: 27-Aug-2007
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Park SJiang WZhou YAdve S(2007)Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architecturesACM SIGMETRICS Performance Evaluation Review10.1145/1269899.125490235:1(169-180)Online publication date: 12-Jun-2007
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Park SJiang WZhou YAdve SGolubchik LAmmar MHarchol-Balter M(2007)Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architecturesProceedings of the 2007 ACM SIGMETRICS international conference on Measurement and modeling of computer systems10.1145/1254882.1254902(169-180)Online publication date: 12-Jun-2007
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Chakraborty KWells PSohi G(2006)Computation spreadingACM SIGARCH Computer Architecture News10.1145/1168919.116889334:5(283-292)Online publication date: 20-Oct-2006
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