Computer Science > Hardware Architecture
[Submitted on 8 Nov 2023 (v1), last revised 29 Mar 2024 (this version, v2)]
Title:A Lightweight Architecture for Real-Time Neuronal-Spike Classification
View PDF HTML (experimental)Abstract:Electrophysiological recordings of neural activity in a mouse's brain are very popular among neuroscientists for understanding brain function. One particular area of interest is acquiring recordings from the Purkinje cells in the cerebellum in order to understand brain injuries and the loss of motor functions. However, current setups for such experiments do not allow the mouse to move freely and, thus, do not capture its natural behaviour since they have a wired connection between the animal's head stage and an acquisition device. In this work, we propose a lightweight neuronal-spike detection and classification architecture that leverages on the unique characteristics of the Purkinje cells to discard unneeded information from the sparse neural data in real time. This allows the (condensed) data to be easily stored on a removable storage device on the head stage, alleviating the need for wires. Synthesis results reveal a >95% overall classification accuracy while still resulting in a small-form-factor design, which allows for the free movement of mice during experiments. Moreover, the power-efficient nature of the design and the usage of STT-RAM (Spin Transfer Torque Magnetic Random Access Memory) as the removable storage allows the head stage to easily operate on a tiny battery for up to approximately 4 days.
Submission history
From: Muhammad Ali Siddiqi [view email][v1] Wed, 8 Nov 2023 16:30:52 UTC (1,244 KB)
[v2] Fri, 29 Mar 2024 18:56:23 UTC (1,405 KB)
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