Open AccessArticle

Traffic Classification and Packet Scheduling Strategy with Deadline Constraints for Input-Queued Switches in Time-Sensitive Networking

School of Communication and Information Engineering, Xi’an University of Posts and Telecommunications, Xi’an 710061, China

Author to whom correspondence should be addressed.

Electronics 2024, 13(3), 629; https://doi.org/10.3390/electronics13030629

Submission received: 27 December 2023 / Revised: 24 January 2024 / Accepted: 26 January 2024 / Published: 2 February 2024

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Abstract

Deterministic transmission technology is a core key technology that supports deterministic real-time transmission requirements for industrial control in Time-Sensitive Networking (TSN). It requires each network node to have a deterministic forwarding delay to ensure the real-time end-to-end transmission of critical traffic streams. Therefore, when forwarding data frames, the switch nodes must consider the time-limited requirements of the traffic. In the input-queued switch system, an algorithm for clock-synchronized deterministic network traffic classification scheduling (CSDN-TCS) is proposed to address the issue of whether a higher-quality-of-service (QoS) performance can be provided under packet deadline constraints. First, the scheduling problem of the switch is transformed into a decomposition problem of the traffic matrix. Secondly, the maximum weight-matching algorithm in graph theory is used to solve the matching results slot by slot. By fully utilizing the slot resources, as many packets as possible can be scheduled to be completed before the deadline arrives. For two types of packet scheduling problems, this paper uses the maximum flow algorithm with upper- and lower-bound constraints to move packets from a larger deadline set to idle slots in a smaller deadline set, enabling early transmission, reducing the average packet delay, and increasing system throughput. When there are three or more types of deadlines in the scheduling set, this scheduling problem is an NP-hard problem. We solve this problem by polling the two types of scheduling algorithms. In this paper, simulation experiments based on the switching size and line load are designed, and the Earliest Deadline First (EDF) algorithm and the Flow-Based Iterative Packet Scheduling (FIPS) algorithm are compared with the CSDN-TCS algorithm. The simulation results show that under the same conditions, the CSDN-TCS algorithm proposed in this paper outperforms the other two algorithms in terms of success rate, packet loss rate, average delay and throughput rate. Compared with the FIPS algorithm, the CSDN-TCS algorithm has lower time complexity under the same QoS performance.

Keywords:

time-sensitive networking; input-queuing system; multi-class packet scheduling; deadline guarantee; quality of service; NP-hard

1. Introduction

Faced with the challenge of network congestion and packet delay resulting from the rapid surge in audio/video traffic and the proliferation of real-time industrial machine applications, there is a growing demand for the real-time transmission and processing of large-scale high-speed data across various domains. For instance, the need for swift adaptation to environmental shifts in autonomous driving, instantaneous data upload and control command delivery in telemedicine, and real-time information exchange in virtual reality systems necessitates the control of delays within the range of 1 to 10 milliseconds, with jitter control at the microsecond level [1]. Traditional Ethernet, due to the absence of a clock synchronization mechanism, bandwidth reservation management mechanism, data packet priority, and other filtering mechanisms, as well as the incompatibility between different protocols, can only mitigate end-to-end delay to the order of tens of milliseconds [2]. Consequently, it fails to provide the requisite quality of service (QoS) assurance for delay and jitter, and falls short of meeting the real-time deterministic transmission requirements for these applications [3].

In November 2012, the IEEE 802.1 working group extended and upgraded Audio Video Bridging (AVB) to the Time-Sensitive Networking (TSN) working group, proposing a series of standards and specifications for link-layer enhancements and traffic policies. These primarily include standards for time synchronization, traffic scheduling, reliable transmission, and network management, aimed at extending the standard Ethernet 802.3 to support real-time and deterministic data transmission for industrial control [4]. TSN adheres to the standard Ethernet protocol suite, naturally possessing superior interoperability advantages. It can provide deterministic latency, bandwidth guarantees, and achieve open 2-layer forwarding [5]. TSN ensures the real-time and reliable transmission of data through a series of key technologies, such as high-precision time synchronization, resource reservation and path control, traffic shaping, and traffic matrix scheduling, thereby guaranteeing the quality of service for time-critical and event-critical applications [6]. In deterministic transmission, packets have known and deterministic delays and are transmitted and received in a predictable manner [7].

The currently released TSN specifications primarily cover four key areas: clock synchronization, data latency, reliability, and resource management. Among these, clock synchronization is considered the foundation of TSN technology. The IEEE 802.1AS standard precisely defines a high-precision clock synchronization mechanism, enabling devices in the network to achieve synchronization at the microsecond level. This ensures that end devices and network equipment can operate in coordination according to the same clock. In addressing scheduling and queuing mechanisms, the IEEE 802.1Qbv standard focuses on the functionality of a time-aware shaper in a strict priority mode with multiple output queues in switches. Through the use of a gate control list, this standard effectively controls the switching time window for each queue, facilitating efficient time-sensitive communication. The IEEE 802.1Qbu standard allows high-priority data to preempt low-priority data, ensuring the real-time transmission of critical control information. Regarding reliability, the IEEE 802.1Qca and IEEE 802.1Qci standards are dedicated to enhancing the reliability level of TSN networks. Additionally, the IEEE 802.1Qat and IEEE 802.1Qcc standards focus on resource management in TSN, including network topology configuration and traffic engineering specifications. These standards collectively establish a unified framework, laying the foundation for the widespread application of TSN technology. The continuous development of TSN and the ongoing updates to standards will further drive advancements in real-time communication technology, providing industries with a more efficient and reliable network infrastructure.

Traffic scheduling is a core mechanism in the TSN standard, utilizing scheduling algorithms to determine the order and timing of data frame transmission at all switch output ports. This ensures compliance with the individual latency and bandwidth requirements of each traffic flow while optimizing the overall transmission performance [8]. TSN categorizes transmitted data into three main types based on different traffic requirements: time-triggered (TT) traffic, rate-constrained (RC) real-time traffic, and best effort (BE) non-real-time traffic [9]. Each type of traffic imposes different demands on end-to-end latency and bandwidth within the network. Traffic scheduling, achieved through the use of scheduling algorithms, produces a scheduling table. This table is then utilized to ascertain the transmission order and timing of each data frame at the output ports of a switch. The goal is to ensure the sequential transmission of data frames on the output link without conflicts, meeting the latency and bandwidth requirements of each flow. This facilitates the coexistence of diverse traffic flows on a single network [5]. To meet elevated QoS assurances, the selection of suitable switching systems and the proposal of more efficient switching scheduling algorithms become imperative [10].

The commonly used high-performance packet-switching systems include output queuing systems, input queuing systems, buffered switching systems and so on [11]. Output queuing systems can control packet delay and provide QoS guarantees [12,13,14]. However, in an N-port switching system, the exchange structure needs to schedule packets at a rate N times that of the input port link, which may lead to resource wastage and poor scalability. On the other hand, input-queuing systems effectively avoid scalability issues. In an input-queuing switching system, packets first queue at the input port and then undergo transmission scheduling, largely avoiding competition at the output ports. However, the single first-in, first-out (FIFO) queue at the input port leads to head-of-line (HOL) blocking, resulting in a decrease in the switch’s throughput. Researchers have addressed the HOL problem by employing virtual output queuing at the input port [15]. Nevertheless, input-queuing switches based on virtual output queuing still use a first-in, first-out forwarding method and do not consider the time-sensitive nature of traffic, thus failing to guarantee forwarding delays [16,17].

The packet switching with deadline guarantees plays a crucial role in ensuring the timely transmission of critical data packets. This technological framework enables networks to efficiently safeguard the quality-of-service performance of real-time applications, preventing a degradation in quality caused by delays in real-time traffic. Therefore, in-depth research into packet scheduling with deadline guarantees is imperative to ensure that networks can maintain the stable and reliable real-time transmission of packets, especially in environments with large switch sizes and high loads. Such research not only advances real-time communication technology but also provides industries with a more efficient and reliable network infrastructure, contributing to the innovation and development of future networks.

In order to achieve deterministic transmission, this paper transforms the packet-switching scheduling problem into a traffic matrix decomposition problem. It sets transmission deadlines, for a set of packets [18]. In the input-queuing switching system, the aim of this paper is to find an efficient scheduling algorithm that allows as many packets as possible to be transmitted before the deadline arrives [19,20].

The scheduling set contains packets with the same deadline, which are classified into the same category, while packets with different deadline constraints should be classified into different categories. Therefore, the deadline-constrained packet scheduling problem can be divided into single-class packet scheduling, two-class packet scheduling, and multi-class packet scheduling based on the number of deadlines [21]. The von Neumann matrix decomposition algorithm is directly used to decompose the traffic matrix to solve the single-class scheduling problem in reference [22]. Unfortunately, the limitation of the von Neumann matrix decomposition algorithm is that it is only applicable to solving single-class packet scheduling problems and cannot effectively solve two-class or multi-class scheduling problems. Traditional methods for solving the multi-class scheduling problem involve using algorithms such as Earliest Deadline First (EDF) or Minimum Laxity First (MLF) and their variants as detailed in [23,24,25,26]. Traditional heuristic algorithms have the advantage of low complexity, but they also have room for improvement in QoS performance metrics, such as throughput, packet loss, and delay. Ref. [27] proposes the iSLIP algorithm based on highest priority scheduling, which reduces the delay at the input end, but its performance is only average in non-uniform traffic scenarios. Ref. [15] proposes a more efficient algorithm, different from traditional heuristic algorithms, such as EDF, called the Flow-Based Iterative Packet Scheduling (FIPS) algorithm. This algorithm achieves advanced scheduling by employing a maximum flow algorithm with upper and lower bounds, ensuring that packets with larger deadlines are scheduled ahead into the available time slots of packets with smaller deadlines. It improves the QoS performance to a certain extent and has been tested on large switch sizes. However, the FIPS algorithm has a high time complexity. Additionally, the FIPS algorithm requires packets in input and output ports to satisfy the scheduling conditions in two-class packet scheduling in order to complete the scheduling. In other words, as long as the traffic matrix does not satisfy the scheduling conditions, packet scheduling cannot be performed. Clearly, the FIPS algorithm places high demands on the traffic matrices in the scheduling set. Ref. [28] proposes a nested periodic flow optimization scheduling algorithm, which decomposes multi-class scheduling problems into two-class and single-class scheduling problems through dimensionality reduction and uses an optimization solver to obtain the scheduling results. Refs. [29,30,31] apply a genetic algorithm to input-queuing switching systems to solve the maximum flow in group scheduling, completing simulations with high throughput, but the article only tested it on a small switch size and has not yet verified its algorithm performance in multi-port switching scenarios. Recently, Ref. [32] proposed an exhaustive priority service empty queue and hybrid weight algorithm, achieving high throughput and low latency under Bernoulli uniform traffic. However, when faced with bursty large traffic and multi-port scenarios, there is still room for improvement in its algorithm’s QoS performance.

Based on the research and analysis of the above algorithms, this paper proposes an algorithm, referred to as the Clock Synchronization Deterministic Network Traffic Classification Scheduling algorithm (CSDN-TCS). In single-class scheduling, this algorithm utilizes the maximum weight-matching algorithm on a per-time-slot basis to decompose the traffic matrix [33]. It ensures that within each time slot before the deadline, each input port group can transmit the maximum number of packets to the output port without encountering competition, thereby fully utilizing time slot resources to accomplish the packet scheduling task.

In the two-class packet scheduling, the CSDN-TCS algorithm employs a maximum flow algorithm with upper and lower bounds to determine the maximum legal flow. It schedules some packets with larger deadlines ahead into the available time slots of packets with smaller deadlines. The key distinction between the CSDN-TCS algorithm and the FIPS algorithm lies in the fact that, when the FIPS algorithm satisfies the scheduling conditions for the larger deadline traffic matrix—specifically, when there is no excessive packet occurrence at each port—it ceases the advanced scheduling of packets, proceeding directly to the decomposition of the traffic matrix. If there are still idle slots in the scheduling time slots of packets with smaller deadlines, these idle slot resources cannot be fully utilized. It means that there is still room for improvement in the QoS performance of the algorithm. The proposed CSDN-TCS algorithm is based on the idea that, as long as there are available time slot resources at the input and output ports of the traffic matrix with smaller deadlines, it iteratively extracts some packets with larger deadlines. It schedules them in advance in the available time slots of packets with smaller deadlines until there are no more available time slot resources in the traffic matrix with smaller deadlines or no more packets that can be scheduled in advance from the traffic matrix with larger deadlines. The algorithm terminates under these conditions. This approach serves to enhance the throughput of the switching system and reduce the average packet delay. Simulation results show that compared with traditional EDF algorithms and FIPS algorithms, the CSDN-TCS algorithm can solve the packet-scheduling problem with deadline guarantees with lower packet loss, higher throughput, and smaller average delay. Moreover, under comparable QoS performance, the time complexity of the CSDN-TCS algorithm is lower and easier to implement. The CSDN-TCS algorithm does not impose additional restrictions on the generation of traffic matrices in two-class packet scheduling, making it more adaptable to general scheduling situations and more in line with actual scheduling scenarios.

The contributions of this paper are as follows:

Firstly, this paper establishes a model for the input-queuing switch system in TSN. It further delves into the operational mechanism of the input queuing system and the scheduling process of packets in TSN networks. On this basis, it clarifies the necessity of studying packet scheduling with deadline guarantees.

Secondly, the paper proposes the CSDN-TCS algorithm, which aims to address how to schedule as many packets as possible under deadline constraints. This algorithm effectively improves the throughput of the switching system, ensuring a reduction in the average delay of packets while maintaining a low packet loss rate, thus enhancing the efficiency of the system.

Finally, we conduct a series of simulation experiments from the perspectives of switch size and line load. We verify the superior QoS performance of the CSDN-TCS algorithm in terms of success rate, packet loss rate, average delay, and throughput.

The rest of this article is organized as follows. The Section 2 introduces the system model and preparation of the packet scheduling problem with deadline guarantee. The Section 3 introduces the design of the algorithm. The Section 4 gives the simulation results and comparative analysis. The Section 5 summarizes the full text.

2. System Model and Preparation

2.1. System Model

This paper establishes a structural model for the TSN input–queuing switch system as shown in Figure 1. In this model, the TSN switch has N input ports and N output ports. Firstly, arriving packets at the input ports are queued, and after passing through virtual output queues, they enter the switching engine. Secondly, the switching system utilizes the IEEE 802.1Qci and IEEE 802.1Qcr standards for packet filtering and asynchronous traffic shaping. The packets enter queues with different priorities. Subsequently, these queues, under the control of a gate control list, open time windows and transmit corresponding traffic flows. Finally, after priority selection, the packets reach the output ports.

In the model, the gate control array directly acts on the positions of the output ports. If packets arriving at the input ports are not forwarded to the output ports before the deadline, the gate control array cannot exert control. Therefore, studying the scheduling of flows with deadline guarantees is essential in this context.

The commonly used symbols and variables along with their meanings in this paper are provided in Table 1.

This paper abstracts the input port and output port of the switch into a bipartite graph model as shown in Figure 2, which divides the input port and output port of the switch into two disjoint subsets U,V, let

G_{t} = (V, E)

, where the set of input ports is U,

U = \{u_{1}, u_{2}, \dots, u_{n}\}

, and the set of output ports is V,

V = \{v_{1}, v_{2}, \dots, v_{n}\}

. Each port can only belong to one subset. Packets arriving at an input port will be directed to the corresponding output port. The bipartite graph-matching method matches the input ports of the switch to unique output ports, enabling conflict-free packet transmission and exchange, thereby improving the switching efficiency and enhancing the throughput of the switching system. In network switches, the use of bipartite graph models can provide a deep understanding of the network topology and help optimize network performance.

This paper transforms the packet scheduling problem of the switch into a traffic matrix decomposition problem by placing packets arriving at various input ports of the switch into the scheduling set S. Based on parameters such as input port, destination port, deadline, and packet quantity of the packets in S, a traffic matrix is created. An example is given with

N = 4

and

d = 3

as shown in Figure 3.

In the traffic matrix,

u_{i} (1 ⩽ i ⩽ N)

indicates switch input ports and

v_{j} (1 ⩽ j ⩽ N)

indicates switch output ports.

p_{i}^{d}

(1 ⩽ i ⩽ N)

represents the total number of packets in the input port,

q_{j}^{d}

(1 ⩽ j ⩽ N)

represents the total number of packets in the output port, and the superscript d represents the deadline for class A packets. The element coordinates are represented as

(i, j)

, where the abscissa i represents the i-th input port in the switch, and the ordinate j represents the j-th output port in the switch. The numerical value of each element indicates the number of packets sent from input port i to output port j. For example, element size 2 at position (3, 3) in matrix A in Figure 3 indicates that the switch needs to transmit 2 packets from input port 3 to output port 3 before the deadline d.

Definition 1.

The excess of input port i in the traffic matrix is denoted as

a_{i}

a_{i} = p_{i}^{d_{1}} - (d_{1} + 1)

. The excess of output port is

b_{j}

b_{j} = q_{j}^{d_{1}} - (d_{1} + 1)

. If

a_{i} > 0

b_{j} > 0

, it indicates that the input or output ports of the traffic matrix are overloaded. If

a_{i} < 0

b_{j} < 0

, it represents that the ports of the service matrix are still vacant.

Definition 2.

The available capacity of input port i in the traffic matrix is denoted as

c_{i}

c_{i} = (d_{1} + 1) - p_{i}^{d_{1}}

. The availability of the output port is

e_{j}

e_{j} = (d_{1} + 1) - q_{j}^{d_{1}}

. If

c_{i} > 0

e_{j} > 0

, it indicates that the input ports or output ports of the traffic matrix are vacant; otherwise, if

c_{i} < 0

e_{j} < 0

, it indicates that the input ports and output ports of the traffic matrix are overloaded.

The available capacity of the time slots in

[0, d_{1}]

and the excess of time slots in

[d_{1} + 1, d_{2}]

can be calculated through the traffic matrix.

2.2. Preparation and Question Formula

Based on the TSN input queuing system exchange model mentioned above, the goal of researching the deadline-guaranteed differentiated services scheduling algorithm is to design a scheduling algorithm that maximizes the network throughput based on the traffic matrix of incoming traffic. Under the constraint of deadlines, the aim is to schedule as many packets as possible. To accomplish this scheduling task, we make the following assumptions, which serve as the foundation for designing and implementing the algorithm.

Assumption A1.

In an input-queued switch, the time axis is divided into equally spaced time slots, with the length of each slot being equal to the time required for the transmission or reception of a single packet. The time slots are numbered starting from 0.

Assumption A2.

In each time slot, the switch establishes a one-to-one connection from an input port to an output port. Each input port or output port can send or receive at most one packet in a time slot, and packets can only be sent or received at the beginning of a time slot. It is assumed that all packets are of a fixed size.

Assumption A3.

Let each packet be associated with a triple

(i, j, d_{n})

, where the

d_{n}

indicates the deadline of packets, let D = {

d_{1}, d_{2}, d_{3}, \dots, d_{n}

(d_{1} < d_{2} < d_{3} < \dots < d_{n})

. The presence of deadlines guarantees that packets must be transmitted from input port i to output port j before the deadline. Packets that miss the deadline will be discarded [34].

Assumption A4.

Packets with smaller deadlines are assigned higher priority, while those with larger deadlines have lower priority. The switching system will prioritize the scheduling of packets with smaller deadlines, followed by those with larger deadlines, ultimately completing the scheduling of all packets [35].

Theorem 1.

For a packet set S, its corresponding set of deadline D = {

d_{1}, d_{2}, d_{3}, \dots, d_{n}

}, (

d_{1} < d_{2} < d_{3}, \dots, < d_{n}

). When the following conditions are met, the set can be referred to as non-overloaded:

\sum_{l = 1}^{p} p_{i}^{d l} ⩽ d_{p} + 1

(1)

\sum_{l = 1}^{p} q_{j}^{d l} ⩽ d_{p} + 1

(2)

\forall i, j \in \{1, 2, \dots N\}

\forall p \in \{1, 2, \dots n\}

Theorem 1 is easily proven because the

\sum_{l = 1}^{m} p_{i}^{d l}

represents the total number of packets arriving at the i-th input port,

\sum_{l = 1}^{m} q_{j}^{d l}

represents the total number of packets arriving at the j-th output port, and

d_{m} + 1

represents the total number of available time slots. When the total number of arriving packets at an input or output port is less than or equal to the total number of available time slots, the system load does not exceed 1, and the system is considered non-overloaded. Otherwise, the system is in an overloaded state.

Based on the analysis of the research objectives, assumptions, and theorems mentioned above, the problem of scheduling classified traffic with deadline guarantees in TSN input queuing switch systems can be described as follows:

max \sum_{t = 1}^{d_{m}} \sum_{i = 1}^{N} \sum_{j = 1}^{N} | p_{i, j} (t) |

(3)

Due to the fact that, at most, one packet can be transmitted between an input port and an output port in any time slot, the following constraints must be satisfied for each time slot:

| p_{i, j} (t) | = \{0, 1\} \forall i, j \in \{1, \dots N\}

(4)

\sum_{j = 1}^{N} p_{i, j} (t) ⩽ 1 \forall i \in \{1, \dots N\}

(5)

\sum_{i = 1}^{N} p_{i, j} (t) ⩽ 1 \forall j \in \{1, \dots N\}

(6)

where

| p_{i, j} (t) |

represents the total number of packets scheduled in slot t.

This paper first models and analyzes the scheduling problem, and identifies the main approach to solving it as follows: Initially, establish an input traffic matrix based on parameters such as input port, destination port, deadline, and number of packets for the input traffic. Then, based on the number of deadlines for the groups in the scheduling set, discuss separately. If all groups in the scheduling set have the same deadline, the maximum weight matching algorithm can be employed to decompose and solve the input traffic matrix. If the groups in the scheduling set have two or more different deadlines, this paper proposes to establish a network flow model based on the input traffic matrix. The scheduling problem is then transformed into a maximum flow problem with upper and lower bounds on the flow, and solved using graph theory’s maximum flow algorithms. This approach is designed to create a scheduling algorithm that satisfies the deadline constraints and maximizes the throughput.

3. Algorithm Design

Grouping packets with the same deadline from the scheduling set into a specific collection, establish a corresponding traffic matrix for each group of packets. A network flow G is created based on the traffic matrix, then a maximum flow algorithm is applied to determine the maximum network flow, which corresponds to an optimal scheduling. Utilize a maximum weight matching algorithm in each time slot to decompose the traffic matrix, ensuring that in each time slot, each input port can only send data to one output port, and simultaneously, each output port can only receive data from one input port. Obtain the final scheduling result through this process. The algorithm can be broadly categorized into three scenarios, each of which will be discussed in the following sections.

3.1. Single-Class Packet Scheduling

Single-class packet scheduling refers to a scheduling set in which all packets have the same deadline. The algorithm proposed in this paper achieves maximum flow by iteratively invoking the maximum weight matching algorithm within the [0, deadline] range. The system’s throughput is enhanced, and time slot resources are fully utilized, allowing as many packets as possible to be scheduled while ensuring deadline guarantees. The following introduces the core algorithm of single-class packet scheduling—the maximum weight matching algorithm.

Maximum Weight Matching Algorithm

The maximum weight matching algorithm, as shown in the Algorithm 1, is used to find a matching in a bipartite graph, where each edge in the bipartite graph is associated with a vertex, and this matching has the maximum sum of weights.

Algorithm 1 Maximum weight matching algorithm.

$(1)$ Initialize the top label and assign a value to each vertex;
$(2)$ Use Hungarian algorithm to find the perfect match;
$(3)$ If no perfect match is found, modify the top marker value;
$(4)$ Repeat steps (2) and (3) until you find a perfect match for the equivalent subgraph;

The time complexity of the maximum weight matching algorithm is

O (N^{3})

Because the time complexity of the single-class packet scheduling algorithm primarily depends on the maximum weight matching algorithm, the complexity of the single-class packet scheduling algorithm, as shown in the Algorithm 2, is also

O (N^{3})

Algorithm 2 Single-class packet scheduling algorithm.

Input: A
Output: $M_{i}$
1:
for $d = 0 : d_{1}$ do //d represents the sequence of time slot
2:
    Called maximum weight matching algorithm(A)
3:
    Output matching matrix $M_{i}$
4:
    Update the traffic matrix A
5:
end for

3.2. Two Types of Packet Scheduling

If there are two different deadlines

D = \{d_{1}, d_{2}\}

in the total packet set and they are met

0 < d_{1} < d_{2}

, put the packets whose deadline is

d_{1}

into set A, and the packets whose deadline is

d_{2}

into B, and let

S = A U B

; this situation is referred to as two-class packet scheduling. The approach of the two-class scheduling algorithm is to prioritize the scheduling of packet sets with smaller deadlines. If there are idle time slots during the scheduling process for the packet sets with smaller deadlines, some of the packets with larger deadline can be scheduled in advance to occupy those time slots.

Advance Scheduling Algorithm

The advance scheduling algorithm, as shown in the Algorithm 3, is shown below, and its time complexity is

O (n^{2} \times m)

, where n is the number of nodes and m is the number of edges.

As an example shown in Figure 4, suppose there are two

4 \times 4

traffic matrices and the deadline of A class is

d_{1} = 9

. The deadline of B class is

d_{2} = 11

Algorithm 3 Advance (A, B).

Input: Traffic matrix A, B
Output: Updated traffic matrix A, B
- $(1)$ Calculate the emptiness of A. $c_{i} = (d_{1} + 1) - p_{i j}^{d_{1}}$ , $e_{j} = (d_{1} + 1) - q_{i j}^{d_{1}}$ .
- $(2)$ Calculate the excess of B. $a_{i} = p_{i j}^{d_{2}} - (d_{2} - d_{1})$ , $b_{j} = q_{i j}^{d_{2}} - (d_{2} - d_{1})$ .
- $(3)$ Construct a four-level flow network with five parameters G( $s, t, U, V, E$ ), where the source point s is the first level of the flow network. The second-level flow network has a set U consisting of N nodes, $U = \{u_{1}, u_{2}, \dots, u_{n}\}$ and $u_{i}$ $(1 ⩽ i ⩽ N)$ represents the i-th input port. There also exists a set V containing N nodes in the third-level flow network, $V = \{v_{1}, v_{2}, \dots, v_{n}\}$ , where $v_{j}$ $(1 ⩽ i ⩽ N)$ represents the j-th output port. The sink node t belongs to the fourth level of the flow network. The set E represents an edge between two nodes, and each edge in the set is assigned a lower boundary and an upper boundary.
- $(4)$ Connect s and $u_{i}$ $(1 ⩽ i ⩽ N)$ , when the condition $0 < a_{i} < c_{i}$ is met, the lower bound $l_{s i} = max \{0, a_{i}\}$ , otherwise, $l_{s_{i}} = 0$ . The upper bound $u_{s_{i}} = c_{i}$ . The purpose of setting upper and lower bounds is to ensure that the number of packets scheduled from input port i of matrix B to input port of matrix A does not exceed the available capacity $c_{i}$ of matrix A, while ensuring that the input ports of matrix B do not become overloaded as much as possible.
- $(5)$ Join the edge between $u_{i}$ and $v_{j}$ $(1 ⩽ i, j ⩽ N)$ . Then, set the lower bound $l_{i j} = 0$ , upper bound $u_{i j} = p_{i j}^{d_{2}}$ , which means that we can select some of packets from the B set, and $p_{i j}^{d_{2}}$ to be scheduled in the free time slot of A set ahead of the deadline.
- $(6)$ Connect $v_{j}$ $(1 ⩽ j ⩽ N)$ and t when $0 < b_{j} < e_{j}$ , lower bound $l_{j t} = max \{0, b_{j}\}$ ; otherwise, $l_{j t} = 0$ , and upper bound $u_{j t} = e_{j}$ , which means that, on the port of B, at most, $e_{j}$ packets will be promoted to the A set along with the packets for transmission scheduling.
- $(7)$ Call the upper and lower bound maximum flow algorithm to find the maximum feasible flow maxflow.
- $(8)$ Output advance matrix $B_{x}$ $(t h e$ $B_{x}$ matrix represents a set of packets scheduled from the B matrix advance to the A matrix’s free time slot);
- $(9)$ Update the traffic matrix A: $A = A + B_{x}$ . The updated A set includes the original A set and the packets from B class in advance;
- $(10)$ Update the traffic matrix B: $B = B - B_{x}$ . The updated B set includes the original B set minus the pre-scheduled partial grouping.
- $(11)$ End

Figure 5 is a flow network constructed by the traffic matrices A and B, and Figure 6 is a maximum legitimate flow in the flow network calculated by the maximum flow algorithm, which means that 13 packets will be promoted from the category B set and scheduled in advance together with the category A packets in their free time slots.

The updated traffic matrix is shown in Figure 7. As the updated matrix A still has available capacity, the advance scheduling algorithm will continue to execute until there is no available capacity at the ports of matrix A or the upper and lower bound maximum flow algorithm cannot find the maximum flow, at which point the algorithm terminates.

The two-class packet scheduling algorithm steps are shown in Algorithm 4, and its time complexity analysis is as follows: In the algorithms for two-class packet scheduling, the time complexity of the advance scheduling algorithm is mainly determined by the construction of the network flow graph and the maximum flow algorithm. Assuming that the time complexity of the maximum flow algorithm is

O (N^{a})

, then the time complexity of the entire advance scheduling algorithm is

O (N^{2} + K \times N^{a})

, where K is the number of iterations. In summary, the algorithm complexity of the two-class packet scheduling algorithms is

O (N^{2} + K \times N^{a})

Algorithm 4 Two-class packet scheduling algorithm.

Input: A, B
Output: $M_{i}$
1:
while (any( $c_{i} > 0$ )||any( $e_{j} > 0$ $))$ do
2:
    Called the advance scheduling algorithm
3:
    Update the traffic matrix A: $A = A + B_{x}$
4:
    Update the traffic matrix B: $B = B - B_{x}$
5:
    if (No legitimate viable stream was found) then
6:
        break
7:
    end if
8:
end while
9:
Schedule A collection in $[0, d_{1}]$
  10:
Schedule B collection in $[d_{1} + 1, d_{2}]$

3.3. Multi-Class Packet Scheduling

Multi-class packet scheduling refers to the scheduling problem where there are three or more different deadlines within the total packet scheduling set S,

S = S^{d_{1}} \cup S^{d_{2}} \cup S^{d_{3}} \cup \dots \cup S^{d_{n}}

. Deadline

D = \{d_{1}, d_{2}, d_{3} \dots d_{n}\}

d_{1} < d_{2} < d_{3} < \dots < d_{n}

. This type of scheduling problem with multiple deadlines has been proven to be an NP-hard problem, making it difficult to find an exact optimal solution [35]. Therefore, the only approach is to approximate the optimal solution.

The multi-class packet scheduling problem is an extension of the two-class packet scheduling problem. It can be reduced by converting the multi-class scheduling problem into a scheduling problem with two deadlines. This is achieved by iteratively invoking two-class packet scheduling algorithms through polling and updating the traffic matrix. This approach resolves the scheduling problem for multiple classes of packets.

Take three-class packet scheduling as an example. First, according to the deadlines, packets in the set are divided into three categories from small to large: high priority

S^{d_{1}}

, medium priority

S^{d_{2}}

, and low priority

S^{d_{3}}

. First, call the advance scheduling algorithm for the

S^{d_{1}}

and

S^{d_{2}}

. At the same time, if there still exist some free time slots in the

S^{d_{1}}

, the advance scheduling algorithm is invoked on the

S^{d_{1}}

and

S^{d_{3}}

until the input and output ports in

S^{d_{1}}

are not free, or the advance scheduling algorithm cannot find the maximum legal flow, then the maximum weight matching algorithm is invoked in the time slot

[0, d_{1}]

to decompose the traffic matrix composed of

S^{d_{1}}

. Then the set

S^{d_{2}}

is regarded as a high-priority set, the set

S^{d_{3}}

is regarded as a sub-priority packet set, and the above process is repeated, scheduling the set

S^{d_{2}}

packets in the time slot

[d_{1} + 1, d_{2}]

. Finally, the set

S^{d_{3}}

is scheduled in the time slot

[d_{2} + 1, d_{3}]

The time complexity analysis of multi-class packet scheduling algorithm, as shown in the Algorithm 5, is as follows. The main time complexity is related to the algorithm used to find the maximum flow. The time complexity of the upper and lower bound maximum flow algorithm is

O (E \times m a x f l o w)

, where E is the number of edges in the graph and the

m a x f l o w

indicates the maximum traffic value in the network. In summary, the overall time complexity of the multi-class packet scheduling algorithm can be approximated as

O (k \times E \times m a x f l o w)

, where k is the number of iterations required to find the maximum traffic in the loop, E is the number of edges in the graph, and the maxflow is the maximum traffic value.

Algorithm 5 Multi-class packet scheduling.

Input: $S_{1}, S_{2}, S_{3} \dots S_{n}$ , D = { $d_{1}, d_{2}, d_{3} \dots d_{n}$ }
Output: $M_{i}$
1:
Calculate the $S_{1}$ matrix’s emptiness $c_{i}$ , $e_{j}$
2:
Calculate the $S_{2}$ matrix’s excess $a_{i}$ , $b_{j}$
3:
for $l = 1 : n - 1$ do
4:
    while $c_{i} > 0$ $| |$ $e_{j} > 0$ do
5:
        for $t = l + 1 : n$ do
6:
           Create network flow $G (s, t, U, V, E)$
7:
           Called Advance scheduling algorithm ( $S_{l}, S_{t}$ )
8:
           Output the lift matrix $B_{x}$
9:
           Update the traffic matrix, $S_{l} = S_{l} + B_{x}$
  10:
           Update the traffic matrix, $S_{t} = S_{t} - B_{x}$
  11:
           if (No legitimate viable stream was found) then
  12:
               break
  13:
           end if
  14:
        end for
  15:
        if (All matrices have been iterated) then
  16:
           break
  17:
        end if
  18:
    end while
  19:
    Schedule the $S_{l}$ collection
  20:
end for
  21:
Schedule the $S_{t}$ collection
  22:
End

4. Simulation and Analysis

We validated the performance of the CSDN-TCS algorithm using software simulation. In this study, simulation experiments were designed from two perspectives: based on the switch size and based on the line load. We compared the QoS performance differences among the traditional heuristic EDF algorithm, the FIPS algorithm, and the CSDN-TCS algorithm under single-class, two-class, and multi-class scenarios (the multi-class experiments are represented by three classes). Specific performance metrics include the success rate, packet loss rate, average delay, and throughput.

4.1. Performance Indicators

In order to study the performance of the algorithm, several indexes such as the success rate, packet loss rate, average delay, and throughput rate are introduced to evaluate the performance of the algorithm.

4.1.1. Success Rate

The success rate is

α

defined as the number of times the algorithm successfully schedules all the packets in the experiment conducted. In a schedulable set, if only one packet is dropped, the algorithm will also be judged as a failure:

α = \frac{s u c c e s s}{t o t a l}

(7)

Success represents the number of successful scheduling and total represents the total number of experiments.

4.1.2. Packet Loss Rate

The packet loss rate

β

is defined as the ratio of the number of discarded packets in a scheduling set to the total number of scheduled packets:

β = \frac{d r o p p e d p a c k e t s}{t o t a l p a c k e t s}

(8)

The dropped packets indicates the number of packets discarded in this schedule, and the total packets indicates the total number of packets in this scheduling.

4.1.3. Average Latency

The average delay

γ

is defined as the ratio between the total delay of successfully scheduled packets and the number of successfully scheduled packets:

γ = \frac{\sum_{i = 1}^{d e a d l i n e} t i m e d e l a y}{t r a n s m i t t e d p a c k e t s}

(9)

The

\sum_{i = 1}^{d e a d l i n e} t i m e d e l a y

indicates the sum of the delays of all successfully scheduled packets in the current transmission, and the

t r a n s m i t t e d p a c k e t s

indicates the total number of packets that are successfully scheduled before the deadline in this transmission.

4.1.4. Throughput Rate

In the experimental simulation, packets that miss the deadline are discarded. We define the throughput

μ

as the ratio between the number of packets that successfully completed the schedule before the deadline and the total number of packets for this schedule:

μ = \frac{p a c k e t s s u c c e s s f u l l y s c h e d u l e d}{t o t a l p a c k e t s}

(10)

The

p a c k e t s s u c c e s s f u l l y s c h e d u l e d

indicates the number of packets successfully transmitted to the corresponding output port in this schedule, and the

t o t a l p a c k e t s

indicates the total number of packets transmitted in this schedule.

4.2. Simulation Experiment Based on Switch Size

First, we study the relationship between the switch size and success rate, packet loss rate, average delay and throughput rate under low-load conditions.

The experimental design ideas based on the switching size are as follows (take two types as examples): randomly generate A and B traffic matrices in

N \times N

size, set deadlines

d_{1}

and

d_{2}

to meet the low-load state of the switching system, and conduct simulation experiments.

From Figure 8, it can be observed that in single-class scheduling, the scheduling success rates of the traditional iSLIP, EDF, MLF algorithms, FIPS algorithm, and CSSDN-TCS algorithm are relatively high when the switch size is small. As the switch size increases, the scheduling success rates gradually decrease. Compared to traditional heuristic algorithms, the success rate performance of the CSDN-TCS algorithm is improved by approximately 10%.

From Figure 9, it can be seen that in single-class scheduling tasks, the average delays of the iSLIP algorithm, EDF, MLF algorithm, FIPS algorithm, and CSDN-TCS algorithm are similar. As the switch size increases, the number of groups in the traffic matrix continues to grow. When

N = 32

, the average delay of the CSDN-TCS algorithm is approximately 32 time slots per packet.

In Figure 10, as the switch size increases, the average packet delay shows an upward trend. When the switch size is small, the average delays of the iSLIP algorithm, EDF, MLF algorithm, FIPS algorithm, and CSDN-TCS algorithm are similar. However, as the switch size continues to increase

N ⩾ 32

, the differences in the average packet delay between various comparison algorithms gradually become apparent. When

N = 128

, the average delay of traditional iSLIP, EDF, and MLF algorithms exceeds 250 time slots per packet. While the FIPS algorithm shows a slight decrease in average packet delay, the proposed CSDN-TCS algorithm maintains an average delay of no more than 200 time slots per packet, exhibiting a significant decrease. The average delay performance of the CSDN-TCS algorithm is improved by 25% compared to other comparative algorithms.

From the graph in Figure 11, it can be observed that the packet loss rate of three-class scheduling decreases with the increase in switch size. From the perspective of the switch, as the switch size increases, the number of input and output ports in the switch also increases. When packets arrive at the switch for scheduling, the probability of conflicts decreases, resulting in a reduction in the packet loss rate. From an algorithmic perspective, for both the FIPS algorithm and CSDN-TCS algorithm, as the switch size increases, larger deadline packets have more opportunities to be scheduled into the idle slots of smaller deadline packets. They are scheduled together with smaller deadline packets, leading to a rapid decrease in the packet loss rate for these two algorithms. When N = 128, the packet loss rate performance of the CSDN-TCS algorithm is improved by approximately 8% compared to iSLIP, EDF, and MLF algorithms.

As can be seen from Figure 12, it is evident that when the switch size is small, the average delay performance of various comparison algorithms is quite similar. The performance of the CSDN-TCS algorithm is slightly better than the others. However, as the switch size increases, the advantage of the CSDN-TCS algorithm in the average packet delay becomes more apparent. When

N = 128

, it is clear that the average delay of the CSDN-TCS algorithm is significantly smaller than the other comparison algorithms. At this point, the average delay performance of the CSDN-TCS algorithm is improved by approximately 15% compared to other comparative algorithms. Moreover, as the switch size grows, the performance advantage of the CSDN-TCS algorithm in the average packet delay becomes more pronounced. Due to the larger number of packets in the traffic matrix of three-class scheduling, leading to higher decision complexity, the average packet delay in three-class scheduling tasks is higher than that in two-class scheduling tasks under the same switch size conditions.

Figure 13 illustrates the relationship between the throughput and switch size for various comparison algorithms. The results indicate that as the switch size increases, the system’s throughput shows an upward trend. When

N ⩾ 32

, the CSDN-TCS algorithm exhibits the highest throughput, followed by the FIPS algorithm, while the traditional iSLIP, EDF, and MLF algorithms have lower throughput. When

N = 128

, the throughput performance of the CSDN-TCS algorithm is improved by approximately 8% compared to traditional iSLIP, EDF, and MLF algorithms.

4.3. Simulation Experiment Based on Line Load

We also study the effect of the line load on the algorithm success rate, packet loss rate, average delay and throughput in

16 \times 16

size. The simulation is carried out for different situations where the line load increases from 0.5 to 1.

The line load is defined as the ratio between the total number of packets scheduled for this transmission and the total number of available time slots:

l o a d = \frac{t o t a l p a c k e t s}{t o t a l t i m e s l o t s}

(11)

where the total packets indicates the total number of packets transmitted in this schedule, and the total time slots indicates the total number of time slots that can be utilized before the deadline in this schedule.

Experimental design ideas based on the line load (taking two types as examples) are as follows: Set appropriate deadlines

d_{1}

and

d_{2}

. Two

16 \times 16

traffic matrices are randomly generated by

l o a d = 0.5 \dots 0.9, 1

, respectively, and scheduling experiments are carried out.

The relationship between the algorithmic line load and packet loss rate is depicted in Figure 14. As the line load of the switching system increases, the packet loss rate also increases. When the system’s line load is relatively low, the packet loss rates of the iSLIP algorithm, EDF, MLF algorithm, FIPS algorithm, and CSDN-TCS algorithm are all at a low level and are relatively close. When

l o a d = 1

, the packet loss rate of the CSDN-TCS algorithm is lower than that of the other compared algorithms, remaining below 6%, while the packet loss rates of the other compared algorithms are all above 10%.

The simulation results for testing the average packet delay of various comparison algorithms are presented in Figure 15. The average packet delay shows a proportional correlation with the line load. When the line load is low, the differences in the average packet delay among the iSLIP algorithm, EDF, MLF algorithm, FIPS algorithm, and CSDN-TCS algorithm are relatively small. However, when there is burst traffic in the switching system, leading to a high load situation. When

l o a d = 1

, the CSDN-TCS algorithm exhibits a lower average delay compared to other compared algorithms, with a performance improvement of approximately 5%. This indicates that the algorithm proposed in this paper demonstrates stronger adaptability in high-load conditions.

From Figure 16, it is evident that in two-class packet scheduling, as the line load increases, the packet loss rate of the switching system also increases. Among them, the iSLIP, EDF, and MLF algorithms exhibit relatively high packet loss rates, with the FIPS algorithm following. The CSDN-TCS algorithm has the lowest packet loss rate, and as the line load increases, the performance advantage of the CSDN-TCS algorithm in the packet loss rate becomes more pronounced. When

l o a d = 0.9

, the packet loss performance of the CSDN-TCS algorithm is improved by approximately 15% compared to the iSLIP, EDF, and MLF algorithms.

Figure 17 illustrates the relationship between the system throughput and line load in two-class scheduling tasks. From the figure, it can be observed that when the system load is low, the switching system has a relatively high throughput. However, when

l o a d ⩾ 0.8

, the system’s throughput decreases rapidly. Nevertheless, the CSDN-TCS algorithm can still maintain a relatively high throughput compared to the other two algorithms in high-load scenarios. When

l o a d = 1

, the throughput of the CSDN-TCS algorithm is still maintained around 85%, demonstrating the reliability of the proposed algorithm under high-load conditions.

In Figure 18, the relationship between the packet loss rate and line load in three-class scheduling tasks is depicted. The system’s packet loss rate is directly proportional to the line load status. The packet loss rate in multi-class scheduling is higher than in two-class scheduling. In other words, as the number of deadlines in the scheduling set increases, the decision complexity of the scheduling tasks rises, leading to a higher packet loss rate. From the figure, it can be observed that the CSDN-TCS algorithm has the lowest packet loss rate, outperforming the iSLIP algorithm, EDF, MLF algorithm, and FIPS algorithm. When

l o a d = 1

, the packet loss performance of the CSDN-TCS algorithm improves by approximately 10% compared to EDF and MLF algorithms.

As can be seen from Figure 19, it is evident that the system throughput is inversely proportional to the line load. As the line load increases, the CSDN-TCS algorithm exhibits the slowest decrease in throughput. Overall, the CSDN-TCS algorithm has the highest throughput, maintaining a level of 90% or above. This is followed by the FIPS algorithm, while the iSLIP, EDF, and MLF algorithms have relatively lower throughput. This indicates that under the same load conditions, the CSDN-TCS algorithm can schedule more packets with deadlines guaranteed compared to other comparison algorithms.

In summary, we conducted simulation experiments from two aspects: based on system switch size and based on system line load. In single-class, two-class, and multi-class (using three classes as an example) scheduling tasks, we compared the success rate, packet loss rate, average packet delay, throughput, and other QoS performance metrics of the traditional iSLIP algorithm, EDF algorithm, MLF algorithm, FIPS algorithm, and CSDN-TCS algorithm. The simulation results indicate that under similar conditions, the CSDN-TCS algorithm can achieve a lower packet loss rate and a smaller average packet delay, ensuring the successful completion of packet scheduling tasks for as many packets as possible before the deadline arrives.

5. Conclusions

Firstly, this paper establishes the model of the input-queuing switch system in TSN, delving into the operational mechanism of input-queuing systems in TSN networks and the scheduling process of packets. Based on this, the paper clarifies the necessity of studying packet scheduling with deadline guarantees. Secondly, the paper proposes the CSDN-TCS algorithm, which builds a network flow model based on the input traffic matrix. It transforms the packet scheduling problem into a network flow problem with upper and lower bounds on the traffic, and solves it using the maximum flow algorithm from graph theory. The algorithm achieves scheduling tasks for single-class, two-class, and multi-class groups with deadline constraints, obtaining results with maximized throughput and minimized average packet delay.

According to the results of simulation experiments, in single-class packet scheduling, the iSLIP algorithm, EDF algorithm, MLF algorithm, FIPS algorithm, and CSDN-TCS algorithm show similar QoS performance when the switch size is small or the line load is low. In two-class and multi-class packet scheduling, especially in scenarios with larger switch sizes or higher line loads, the CSDN-TCS algorithm outperforms other algorithms with higher throughput and smaller average delay. Moreover, under comparable QoS performance, the CSDN-TCS algorithm has lower time complexity than the FIPS algorithm, requiring less scheduling complexity for the traffic matrix and making it more adaptable to general scheduling scenarios.

The research in this paper is still ongoing and requires further refinement of related work. Currently, the research is based on the offline scheduling planning of a single node and has not been extended to global scheduling with multiple nodes, which will be a focus of future work. On the other hand, the research in this paper is more suitable for TSN closed network scenarios, where planning can be done in advance. However, in the face of dynamically changing real-time networks, the real-time computation of scheduling results may be required, and the proposed algorithm’s complexity in this context may be higher.

Author Contributions

Conceptualization, L.Z., G.W. and K.Z.; methodology, L.Z. and G.W.; software, L.Z. and G.W.; validation, L.Z. and G.W.; investigation, L.Z. and G.W.; resources, H.C.; writing—original draft preparation, G.W.; writing—review and editing, L.Z. and G.W.; visualization, L.Z. and G.W.; supervision, K.Z. and H.C.; funding acquisition, L.Z. All authors have read and agreed to the published version of the manuscript.

Funding

This work was supported in part by National Natural Science Foundation of China under Grant 62102314, and Natural Science Basic Research Program of Shaanxi Province under Grant 2021JQ-708 and 2022JQ-635.

Data Availability Statement

Data is contained within the article.

Conflicts of Interest

The authors declare no conflicts of interest.

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Figure 1. TSN input-queuing switch system model.

Figure 2. Bipartite graph model. (a) Bipartite graph. (b) Bipartite graph matching.

Figure 3. Class A traffic matrix.

Figure 4. Traffic matrices A and B.

Figure 5. Stream network.

Figure 6. Maximum feasible flow.

Figure 7. Updated traffic matrices A and B.

Figure 8. The relationship between the scheduling success rate and switch size in single-class scheduling.

Figure 9. The relationship between average packet delay and switch size in single-class scheduling.

Figure 10. The relationship between average packet delay and switch size in two-class scheduling.

Figure 11. The relationship between packet loss rate and switch size in three-class scheduling.

Figure 12. The relationship between the average packet delay and switch size in three-class scheduling.

Figure 13. The relationship between the throughput and switch size in three-class scheduling.

Figure 14. The relationship between the packet loss rate and line load in single-class scheduling.

Figure 15. The relationship between average packet delay and line load in single-class scheduling.

Figure 16. The relationship between the packet loss rate and line load in two-class scheduling.

Figure 17. The relationship between the throughput and line load in two-class scheduling.

Figure 18. The relationship between the packet loss rate and line load in three-class scheduling.

Figure 19. The relationship between the throughput and line load in three-class scheduling.

Table 1. Summary of notations.

Notation	Description
$G_{t}$	The bipartite graph
U	The set of input ports
V	The set of output ports
E	The edges in a bipartite graph
S	The set of total packet schedules
$u_{i}$	The input port of the switch
$v_{j}$	The output port of the switch
D	The set of deadlines
$p_{i}^{d}$	The total number of packets in the input port
$q_{j}^{d}$	The total number of packets in the output port
$a_{i}$	The excess of input port i of the traffic matrix
$b_{j}$	The excess of output port j of the traffic matrix
$c_{i}$	The available capacity of input port i of the traffic matrix
$e_{j}$	The available capacity of output port j of the traffic matrix
$p_{i, j} (t)$	The total number of packets in the input port
$p_{i}^{d_{l}}$	The number of packets at the input port
$q_{j}^{d_{l}}$	The number of packets at the output port

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Zheng, L.; Wei, G.; Zhang, K.; Chu, H. Traffic Classification and Packet Scheduling Strategy with Deadline Constraints for Input-Queued Switches in Time-Sensitive Networking. Electronics 2024, 13, 629. https://doi.org/10.3390/electronics13030629

AMA Style

Zheng L, Wei G, Zhang K, Chu H. Traffic Classification and Packet Scheduling Strategy with Deadline Constraints for Input-Queued Switches in Time-Sensitive Networking. Electronics. 2024; 13(3):629. https://doi.org/10.3390/electronics13030629

Chicago/Turabian Style

Zheng, Ling, Guodong Wei, Keyao Zhang, and Hongyun Chu. 2024. "Traffic Classification and Packet Scheduling Strategy with Deadline Constraints for Input-Queued Switches in Time-Sensitive Networking" Electronics 13, no. 3: 629. https://doi.org/10.3390/electronics13030629

APA Style

Zheng, L., Wei, G., Zhang, K., & Chu, H. (2024). Traffic Classification and Packet Scheduling Strategy with Deadline Constraints for Input-Queued Switches in Time-Sensitive Networking. Electronics, 13(3), 629. https://doi.org/10.3390/electronics13030629

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