Article

Noise tolerant low voltage XOR-XNOR for fast arithmetic

Authors:

Mohamed Elgamel,

Sumeer Goel,

Magdy BayoumiAuthors Info & Claims

GLSVLSI '03: Proceedings of the 13th ACM Great Lakes symposium on VLSI

Pages 285 - 288

https://doi.org/10.1145/764808.764882

Published: 28 April 2003 Publication History

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Abstract

With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequency are the characteristics for deep submicron circuits. This paper proposes a low voltage noise tolerant XOR-XNOR gate with 8 transistors. The proposed gate has been implanted in an already existing (5-2) compressor cell to test its driving capability. The proposed gate is characterized and compared with those published ones for reliability and energy efficiency. The average noise threshold energy (ANTE) and the energy normalized ANTE metrics are used for quantifying the noise immunity and energy efficiency respectively. Results using 0.18m CMOS technology and HSPICE for simulation show that the proposed XOR-XNOR circuit is more noise-immune and displays better power-delay product characteristics than the compared circuit. Also, the circuit proves to be faster in operation and works at all ranges of supply voltage starting from 0.6V to 3.3V.

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Cited By

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Kim J(2023)Design of an Energy-Efficient Parity Function Circuit2023 International Conference on Engineering and Emerging Technologies (ICEET)10.1109/ICEET60227.2023.10525772(1-6)Online publication date: 27-Oct-2023
https://doi.org/10.1109/ICEET60227.2023.10525772
Sarada MSrinivasulu APal D(2017)Novel, low-supply, differential XOR/ XNOR with rail-to-rail swing, for hamming-code generationInternational Journal of Electronics Letters10.1080/21681724.2017.13577616:3(272-287)Online publication date: 25-Jul-2017
https://doi.org/10.1080/21681724.2017.1357761
Musala SSrinivasulu A(2016)Self testing and fault secure XOR/XNOR circuit using FinFETs2016 International Conference on Communication and Signal Processing (ICCSP)10.1109/ICCSP.2016.7754347(1222-1226)Online publication date: Apr-2016
https://doi.org/10.1109/ICCSP.2016.7754347
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Index Terms

Noise tolerant low voltage XOR-XNOR for fast arithmetic
1. Hardware
  1. Integrated circuits
    1. Logic circuits
      1. Combinational circuits

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Information

Published In

GLSVLSI '03: Proceedings of the 13th ACM Great Lakes symposium on VLSI

April 2003

320 pages

ISBN:1581136773

DOI:10.1145/764808

General Chair:
Mircea Stan
University of Virginia
,
Program Chairs:
David Garrett
Bell Labs Research, Lucent Technologies
,
Kazuo Nakajima
University of Maryland

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 28 April 2003

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GLSVLSI03

Sponsor:

GLSVLSI03: Great Lakes Symposium on VLSI 2003

April 28 - 29, 2003

D. C., Washington, USA

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

View all

Kim J(2023)Design of an Energy-Efficient Parity Function Circuit2023 International Conference on Engineering and Emerging Technologies (ICEET)10.1109/ICEET60227.2023.10525772(1-6)Online publication date: 27-Oct-2023
https://doi.org/10.1109/ICEET60227.2023.10525772
Sarada MSrinivasulu APal D(2017)Novel, low-supply, differential XOR/ XNOR with rail-to-rail swing, for hamming-code generationInternational Journal of Electronics Letters10.1080/21681724.2017.13577616:3(272-287)Online publication date: 25-Jul-2017
https://doi.org/10.1080/21681724.2017.1357761
Musala SSrinivasulu A(2016)Self testing and fault secure XOR/XNOR circuit using FinFETs2016 International Conference on Communication and Signal Processing (ICCSP)10.1109/ICCSP.2016.7754347(1222-1226)Online publication date: Apr-2016
https://doi.org/10.1109/ICCSP.2016.7754347
Musala SSrinivasulu A(2016)FinFET based 4-BIT input XOR/XNOR logic circuit2016 International Conference on Applied Electronics (AE)10.1109/AE.2016.7577277(219-222)Online publication date: Sep-2016
https://doi.org/10.1109/AE.2016.7577277
Rashidi BSayedi SFarashahi R(2016)An efficient and high-speed VLSI implementation of optimal normal basis multiplication over GF(2m)Integration, the VLSI Journal10.1016/j.vlsi.2016.05.00655:C(138-154)Online publication date: 1-Sep-2016
https://dl.acm.org/doi/10.1016/j.vlsi.2016.05.006
Yadav NKhandelwal SAkashe S(2013)Design and analysis of FINFET pass transistor based XOR and XNOR circuits at 45 nm technology2013 International Conference on Control, Computing, Communication and Materials (ICCCCM)10.1109/ICCCCM.2013.6648909(1-5)Online publication date: Aug-2013
https://doi.org/10.1109/ICCCCM.2013.6648909
Boddapati HNaregalkar ARaju BMishra B(2011)Novel asynchronous addersProceedings of the International Conference & Workshop on Emerging Trends in Technology10.1145/1980022.1980252(1055-1058)Online publication date: 25-Feb-2011
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Kumar RVimal Kant Pandey (2011)A new 5-transistor XOR-XNOR circuit based on the pass transistor logic2011 World Congress on Information and Communication Technologies10.1109/WICT.2011.6141325(667-671)Online publication date: Dec-2011
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Tripathi RMishra SPrakash S(2011)A Novel 14-Transistors Low-Power High-Speed PPM AdderProceedings of the 2011 International Symposium on Electronic System Design10.1109/ISED.2011.19(124-128)Online publication date: 19-Dec-2011
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Aymen FBelgacem HChiraz K(2011)A new efficient self-checking Hsiao SEC-DED memory error correcting codeICM 2011 Proceeding10.1109/ICM.2011.6177346(1-5)Online publication date: Dec-2011
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