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An evolution-based approach to partitioning ASIC systems

Published: 01 June 1989 Publication History

Abstract

In the design of application specific integrated circuits (ASIC), it is often required to partition a logic complex into smaller subcomplexes satisfying a number of constraints. Due to the complexity of the problem, most existing algorithms try to optimize on only one constraint. In this paper, we use the concept of evolution to derive a partitioning algorithm capable of handling a number of constraints. Our algorithm provides a uniform multi-way partitioning scheme, obtains good partitions, and has a fast execution time.

References

[1]
S. Goto and T. Matsuda, "Partiaioning, Assignment and Placement," Layou~ Design and ~'erfficarion (Ed. by T. Ohtsuki), North-Holland, 1986.
[2]
Y. Perl and M. Snir, "Circuit Parlilioning witlh Size and Connection Constraints," Networks, vol. 13, pp. 365-375, 1983.
[3]
B.W. Kernighan and S. Lin, "An Efficient Heuristic Procedure for Partitioning Graphs," Bell System Technical Journal, vol. 49, pp. 291-307, February 1970,
[4]
Earl E. Barnes, " An Algorithm for Par~titioning the Nodes of a Graph," 1BAI Technical Report RC8 6 90, 1981.
[5]
T. Bui, S. Chaudhuri, T. Leighton, and M. Sipser, "Graph Bisection Algorithm with Good Average Case Behavior," Proceedings of the 25eh 1gEE Symposium on Foundations of Comptaing, pp. 181-192, 1984.
[6]
C.M. Fiduccia and R. M. Ma't~hejrses, "A Linear- Time Heuristics for Improving Network Partitions," Proceedings of the 19th Design Auzorna~ion Conference, pp. 175-181, January 1982.
[7]
D. Schweikert and B, Kernighan, "A Proper Model for the Partitioning of Electrical Circuits," Proceedings of zhe 9th Design Au~orna~ion Workshop, pp. 57-62, 1972.
[8]
B. Dunham, D. Fridshal, R. Fridshal, J. H. North, "Design by Natural Selection," Synthese, D. Reidel Publicalion Company, Dordrecht-Holland, pp. 254-259, 1963.
[9]
Ralph-Michael Kling and Prithviraj Banerjee, "ESP: A New Standard Cell Placement Package Using Simulated Evolution," Proceedings of the 24th Design Automation Conference, June 1987.
[10]
J .P. Cohoon and W. D. Paris, "Genetic Placement," Proceedings of the 1gEE international Conference On Computer-Aided Design, pp. 422-425, 198~5.
[11]
M. Garey and D. Johnson, Computers and Intractability: A Guide to the Theory of NP-Completeness, W. H. Freeman and Company, New York, pp. 126, 1979.

Cited By

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  • (2018)Memetic multilevel hypergraph partitioningProceedings of the Genetic and Evolutionary Computation Conference10.1145/3205455.3205475(347-354)Online publication date: 2-Jul-2018
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  • (2013)Iterative non-deterministic algorithms in on-shore wind farm design: A brief surveyRenewable and Sustainable Energy Reviews10.1016/j.rser.2012.11.04019(370-384)Online publication date: Mar-2013
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cover image ACM Conferences
DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference
June 1989
839 pages
ISBN:0897913108
DOI:10.1145/74382
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 01 June 1989

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DAC89: The 26th ACM/IEEE-CS Design Automation Conference
June 25 - 28, 1989
Nevada, Las Vegas, USA

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DAC '89 Paper Acceptance Rate 156 of 465 submissions, 34%;
Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2018)Memetic multilevel hypergraph partitioningProceedings of the Genetic and Evolutionary Computation Conference10.1145/3205455.3205475(347-354)Online publication date: 2-Jul-2018
  • (2016)Wake effect modeling: A review of wind farm layout optimization using Jensen׳s modelRenewable and Sustainable Energy Reviews10.1016/j.rser.2015.12.22958(1048-1059)Online publication date: May-2016
  • (2013)Iterative non-deterministic algorithms in on-shore wind farm design: A brief surveyRenewable and Sustainable Energy Reviews10.1016/j.rser.2012.11.04019(370-384)Online publication date: Mar-2013
  • (2010)Computational intelligence techniques for placement of wind turbines: A brief plan of research in Saudi Arabian perspective2010 IEEE International Energy Conference10.1109/ENERGYCON.2010.5771736(519-523)Online publication date: Dec-2010
  • (2010)Total Power Optimization for Combinational Logic Using Genetic AlgorithmsJournal of Signal Processing Systems10.1007/s11265-009-0338-358:2(145-160)Online publication date: 1-Feb-2010
  • (2006)Empirical and theoretical studies of the simulated evolution method applied to standard cell placementIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.8892610:10(1303-1315)Online publication date: 1-Nov-2006
  • (2006)A performance and routability-driven router for FPGAs considering path delaysIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.57383216:2(179-185)Online publication date: 1-Nov-2006
  • (2006)Analysis of convergence properties of a stochastic evolution algorithmIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.50394915:7(826-831)Online publication date: 1-Nov-2006
  • (2006)Applying simulated evolution to high level synthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.21500212:3(389-409)Online publication date: 1-Nov-2006
  • (2006)An improved two-way partitioning algorithm with stable performance [VLSI]IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/43.10350010:12(1502-1511)Online publication date: 1-Nov-2006
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