Article

A solenoidal basis method for efficient inductance extraction

Authors:

Hemant Mahawar,

Weiping ShiAuthors Info & Claims

DAC '02: Proceedings of the 39th annual Design Automation Conference

Pages 751 - 756

https://doi.org/10.1145/513918.514107

Published: 10 June 2002 Publication History

Abstract

The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction is the solution of large, dense, complex linear systems of equations via iterative methods. Accelerating the convergence of the iterative method through preconditioning is made difficult due to the non-availability of the system matrix. This paper presents a novel algorithm to solve these linear systems by restricting current to a discrete solenoidal subspace in which Kirchoff's law is obeyed, and solving a reduced system via an iterative method such as GMRES. A preconditioner based on the Green's function is used to achieve near-optimal convergence rates in several cases. Experiments on a number of benchmark problems illustrate the advantages of the proposed method over FastHenry.

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Cited By

Mahawar HSarin V(2018)Parallel iterative methods for dense linear systems in inductance extractionParallel Computing10.1016/S0167-8191(03)00100-529:9(1219-1235)Online publication date: 31-Dec-2018
https://dl.acm.org/doi/10.1016/S0167-8191%2803%2900100-5
Yi YWenzel RSarin VShi W(2009)Inductance extraction for interconnects in the presence of nonlinear magnetic materialsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.201886928:7(1106-1110)Online publication date: 1-Jul-2009
https://dl.acm.org/doi/10.1109/TCAD.2009.2018869
Mahawar HSarin V(2006)Parallel algorithms for inductance extraction of VLSI circuitsProceedings of the 20th international conference on Parallel and distributed processing10.5555/1898953.1899013(80-80)Online publication date: 25-Apr-2006
https://dl.acm.org/doi/10.5555/1898953.1899013
Show More Cited By

Index Terms

A solenoidal basis method for efficient inductance extraction
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement
      2. Wire routing
  2. Hardware validation
    1. Functional verification
      1. Simulation and emulation

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Published In

cover image ACM Conferences

DAC '02: Proceedings of the 39th annual Design Automation Conference

June 2002

956 pages

ISBN:1581134614

DOI:10.1145/513918

General Chair:
Bryan Ackland
Agere Systems, Inc., Holmdel, NJ

Copyright © 2002 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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Published: 10 June 2002

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DAC02: 39th Design Automation Conference

June 10 - 14, 2002

Louisiana, New Orleans, USA

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DAC '02 Paper Acceptance Rate 147 of 491 submissions, 30%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

Mahawar HSarin V(2018)Parallel iterative methods for dense linear systems in inductance extractionParallel Computing10.1016/S0167-8191(03)00100-529:9(1219-1235)Online publication date: 31-Dec-2018
https://dl.acm.org/doi/10.1016/S0167-8191%2803%2900100-5
Yi YWenzel RSarin VShi W(2009)Inductance extraction for interconnects in the presence of nonlinear magnetic materialsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2009.201886928:7(1106-1110)Online publication date: 1-Jul-2009
https://dl.acm.org/doi/10.1109/TCAD.2009.2018869
Mahawar HSarin V(2006)Parallel algorithms for inductance extraction of VLSI circuitsProceedings of the 20th international conference on Parallel and distributed processing10.5555/1898953.1899013(80-80)Online publication date: 25-Apr-2006
https://dl.acm.org/doi/10.5555/1898953.1899013
Mahawar HSarin VGrama A(2004)Parallel performance of hierarchical multipole algorithms for inductance extractionProceedings of the 11th international conference on High Performance Computing10.1007/978-3-540-30474-6_48(450-461)Online publication date: 19-Dec-2004
https://dl.acm.org/doi/10.1007/978-3-540-30474-6_48
Yan SLiu JShi WYasuura H(2003)Improving boundary element methods for parasitic extractionProceedings of the 2003 Asia and South Pacific Design Automation Conference10.1145/1119772.1119823(261-267)Online publication date: 21-Jan-2003
https://dl.acm.org/doi/10.1145/1119772.1119823

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