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Timing driven co-design of networked embedded systems

Published: 28 January 2000 Publication History
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References

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RAMANATHAN, D., JEJURIKAR, R., AND GUPTA, R. K. Timing modeling and analysis for networked embedded systems. Technical report, University of California at Irvine, Nov. 1999.
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DASDAN, A., RAMANATHAN, D., AND GUPTA, R. K. A timingdriven design and validation methodology for embedded realtime systems. A CM Trans. on Design Automation of Electronic Systems. 3, 4 (Oct. 1998).
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RAMANATHAN, D., DASDAN, A., AND GUPTA, R. K. High-Level Modeling of Communication in Real-Time Embedded Systems. IEEE High-Level Design Validation and Test Workshop, Nov 1998, pp. 172-180.
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DASDAN, A. Timing Analysis of Embedded Real-Time Systems. Ph.D Thesis, University of Illinois at Urbana-Champaign, 1998.
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MATHUR, A., DASDAN, A., AND GUPTA, R. K. Rate analysis of embedded systems. ACM Trans. on Design Automation of Electronic Systems 3, 3 (July 1998).
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D. RAMANATHAN AND A. DASDAN AND R. K. GUPTA Timing Driven HW/SW Codesign Based on Task Structuring and Process Timing Simulation IEEE Workshop on Hardware Software Co-design (CODES), May 1999

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  • (2008)System-Level Assertion-Based Performance Verification for Embedded SystemsAdvances in Computer Science and Engineering10.1007/978-3-540-89985-3_30(243-250)Online publication date: 2008
  1. Timing driven co-design of networked embedded systems

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    cover image ACM Conferences
    ASP-DAC '00: Proceedings of the 2000 Asia and South Pacific Design Automation Conference
    January 2000
    691 pages
    ISBN:0780359747
    DOI:10.1145/368434
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    Published: 28 January 2000

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    • (2008)System-Level Assertion-Based Performance Verification for Embedded SystemsAdvances in Computer Science and Engineering10.1007/978-3-540-89985-3_30(243-250)Online publication date: 2008

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