Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/3670474.3685972acmconferencesArticle/Chapter ViewAbstractPublication PagesmlcadConference Proceedingsconference-collections
invited-talk

When Device Modeling Meets Machine Learning: Opportunities and Challenges (Invited)

Published: 09 September 2024 Publication History

Abstract

Device modeling is essential for circuit simulations and designs in terms of constructing the circuit matrix equations of KCL and KVL. While there are classical methodologies, machine learning techniques are promising to bring innovations in the landscape of device modeling. This work reviews the device modeling from a top-down perspective, covering two different interpretations of modeling. Then the recent process in the domain-specific machine learning approaches is briefly summarized for logic and memory devices. The challenges ahead, for the machine learning model to support the industry's practical needs, are analyzed. A concept of fusion model, by deeply merging device physics and neural networks, is also explained.

References

[1]
M. Rapp, H. Armouch, Y. Lin, B. Yu, D. Z. Pan, M. Wolf, J. Henkel, "MLCAD: a survey of research in machine learning for CAD," IEEE TCAD, vol. 41, no. 10, pp. 3162--3181, 2022.
[2]
F. Klemme, J. Prinz, V. M. van Santen, J. Henkel, and H. Amrouch, "Modeling emerging technologies using machine learning: Challenges and opportunities", in Proc. ICCAD, 2020, pp. 1--9.
[3]
L. Chen, et al., "The dawn of AI-native EDA: promises and challenges of large circuit models," arXiv preprint, arXiv:2403.07257, 2024.
[4]
Semikong, http://semikong.aitomatic.com/, accessed on July, 2024
[5]
J. R. Brews, "A charge-sheet model of the MOSFET," Solid-State Electronics, vol. 21, no. 2, pp. 345--355, 1978.
[6]
L. Zhang, M. Chan, " Artificial neural network design for compact modeling of generic transistors," J. Comput. Electron., vol. 16, no. 3, pp. 825--832, Sep. 2017.
[7]
J. Wang, et al., "Artificial Neural Network-Based Compact Modeling Methodology for Advanced Transistors, " IEEE Trans. Electron Devices, vol. 68, no. 3, pp. 1318--1325, March 2021.
[8]
C. T. Tung, C. Hu, "Neural Network-Based BSIM Transistor Model Framework: Currents, Charges, Variability, and Circuit Simulation," IEEE Trans. Electron Devices, vol. 70, no. 4, pp. 2157--2160, 2023.
[9]
W. Dai, et al., "An Automatic Integration Network Approach for Generic Device Charge Modeling," in Proc. ICSICT, 2022, pp. 1--3.
[10]
J. Choi, et al., "Enhancement and expansion of the neural network-based compact model using a binning method," IEEE JEDS, vol, 12, pp. 65--73, 2024.
[11]
Y. Li, W. Dai, K. Geng, L. Zhang, R. Wang, R. Huang, "An Automatic Parameter Extraction Method Based on Autoencoder for PIN Diode Model," in Proc. ICSICT, 2022, pp. 1--3.
[12]
M. Kao, F. Chavez, S. Khandelwal and C. Hu, "Deep Learning-Based BSIM-CMG Parameter Extraction for 10-nm FinFET," IEEE Trans. Electron Devices, vol. 69, no. 8, pp. 4765--4768, 2022.
[13]
F. Chavez, C. T. Tung, M. Yao, C. Hu, J. Chen, S. Khandelwal, "Deep learnmg-based I-V global parameter extraction for BSIM-CMG," Solid-State Electronics, 209, pp. 108766, 2023.
[14]
A. Ashai, et al., "Deep learning-based fast BSIM-CMG parameter extraction for general input dataset," IEEE Trans. Electron Devices, vol. 70, no. 7, pp. 3437--3441, 2023.
[15]
J. Dobeš, L. Pospíšil and A. Yadav, "Precise characterization of memristive systems by cooperative artificial neural networks," in Proc. SCIS-ISIS, 2012, pp. 2130--2133.
[16]
A. Lin, et al., "A process-aware memory compact-device model using long-short term memory," IEEE Access, vol. 9, pp. 3126--3139, 2021.
[17]
Y. Zhang, et al., "GEM: a generalized memristor device modeling framework based on neural network for transient circuit simulation," IEEE TCAD, vol. 42, no. 3, pp. 834--846, 2023.
[18]
Z. Rong, W. Dai, L. Zhang and M. Chan, "Generic Compact Modeling of Emerging Memories with Recurrent NARX Network," IEEE Electron Device Letters, vol. 44, no. 8, pp. 1272--1275, 2023.
[19]
Z. Zhang, et al., "New-Generation Design-Technology Co-Optimization (DTCO): Mechaine-Learning Assisted Modeling Framework," in Proc. SWW, 2019, pp. 1--2.
[20]
W. Dai, et al., "Benchmarking Artificial Neural Network Models for Design Technology Co-optimization," in Proc. ISEDA, 2023, pp. 423--427.
[21]
W. Dai, et al., "Statistical compact modeling with artificial neural networks," IEEE TCAD, vol. 42, no. 12, pp. 5156--5160, 2023.
[22]
C. Park, H. Cho, J. Lee, "Enhancing interpretability of neural compact mdoels: towards reliable device modeling," IEEE JEDS, early access.
[23]
H. Liu, et al., "A neural network-based framework for accelerated device-circuit electrothermal co-simulations in GAAFETs," in Proc. ISEDA, 2024, pp. 1--5.
[24]
Z. Yang, A. D. Gaidhane, K. Anderson, G. Workman and Y. Cao, "Graph-Based Compact Model (GCM) for Efficient Transistor Parameter Extraction: A Machine Learning Approach on 12 nm FinFETs," IEEE Trans. Electron Devices, vol. 71, no. 1, pp. 254--262, 2024.

Index Terms

  1. When Device Modeling Meets Machine Learning: Opportunities and Challenges (Invited)

    Recommendations

    Comments

    Please enable JavaScript to view thecomments powered by Disqus.

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    MLCAD '24: Proceedings of the 2024 ACM/IEEE International Symposium on Machine Learning for CAD
    September 2024
    321 pages
    ISBN:9798400706998
    DOI:10.1145/3670474
    Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 09 September 2024

    Check for updates

    Author Tags

    1. artificial neural network
    2. compact model
    3. device modeling
    4. machine learning

    Qualifiers

    • Invited-talk
    • Research
    • Refereed limited

    Conference

    MLCAD '24
    Sponsor:

    Acceptance Rates

    MLCAD '24 Paper Acceptance Rate 35 of 83 submissions, 42%;
    Overall Acceptance Rate 35 of 83 submissions, 42%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • 0
      Total Citations
    • 83
      Total Downloads
    • Downloads (Last 12 months)83
    • Downloads (Last 6 weeks)17
    Reflects downloads up to 14 Dec 2024

    Other Metrics

    Citations

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media