SLITS: Sparsity-Lightened Intelligent Thread Scheduling

To make the most of hardware resources in multi-core architectures, effective thread scheduling is crucial. To achieve this, various scheduling objectives have been developed, such as reducing hardware resource contention [1, 11], allocating resources evenly for co-running threads [ 5, 6], and following priority-based policies [7]. Current thread scheduling designs can be categorized into two types. The first type involves fixed-rule scheduling1, which does not depend on workload characteristics and cannot meet the needs of different scheduling objectives. The second type takes the scheduling objectives into account by collecting run-time information on threads together with their correlations (e.g., Cache Miss Count [10, 13], Thread IPC [20], dynamic priority requirements like Earliest Deadline First [2, 8, 17]), and making scheduling decisions based on thread-to-thread interactions.

A unified approach to these two types of scheduler designs can be achieved by focusing on Thread-Interaction statistics. To this end, we introduce the Thread-Interaction Matrix (TIM), which stores statistics on thread-to-thread interaction. These statistics can be any type of run-time statistics concerning the thread-to-thread pairs (e.g., Cache Miss Count [10, 13], Thread IPC [20], dynamic priority requirements like Earliest Deadline First [2, 8, 17])2. For fixed-rule scheduling, the TIM contains static values as the statistics do not affect the scheduling decisions. Based on the TIM, scheduling policies can be customized by specifying the rules of thread rescheduling, such as reschedule conditions and strategy. Combining the Thread-Interaction Matrix and scheduling policy provides a formalization of existing thread scheduler designs. Therefore, it is essential to design a general scheduler that can be tailored to different scheduling objectives by co-designing the Thread-Interaction Matrix and the scheduling policy in a synergistic manner.