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An integrated temporal partioning and partial reconfiguration technique for design latency improvement

Published: 01 January 2000 Publication History
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References

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M.Kaul and Ranga Vemuri, "Temporal Partitioning combined with Design Space Exploration for Latency Minimization of Run-Time Reconfigured Designs", Design and Test in Europe, DATE 98, IEEE Computer Society, Paris, 1998 pp.389- 396.
[2]
K. M. GajjalaPurna and D. Bhatia, "Partitioning in Time: A Paradigm for Reconfigurable Computing", ICCD98, IEEE Computer Society, October, 1998, pp. 340-345.
[3]
Xilinx Corporation, San Jose, California, XC6200 Datasheet, 1997.
[4]
Atmel Corporation, San Jose, California, http://www.atmel.com.
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N. Shirazi, W. Luk, "Automating Production of Run-Time Reconfigurable Designs", Field-Programmable Gate Arrays, FPGA 1996, pp. 147-156.
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J-P Heron, R.F. Woods, "Accelerating run-time reconfiguration on FCCMs", IEEE Symposium on Field-Programmable Custom Computing Machines, FCCM '99, Preliminary Proceedings, Napa, CA, April 21-23, 1999.
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S. Hauck, Z. Li, E. J. Schwabe, "Configuration Compression for the Xilinx XC6200 FPGA", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 8, August, 1999, pp. 1107-1113.
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D. D. Gajski, N. D. Dutt, A. Wu, S. Lin, High-level Synthesis: Introduction to Chip and System Design, Kluwer Academic Publishers, 1992.
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N. Narasimhan "Formal Synthesis: Formal Assertions Based Verification in a High-Level Synthesis System", PhD Thesis, University of Cincinnati, 1998.
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M. Kaul, R. Vemuri, "Integrated Block-Processing and Design-Space Exploration in Temporal Partitioning for RTR Architectures", Reconfigurable Architectures Workshop, RAW'99, Springer Publ., pp.606-615.
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I. Ouaiss, S. Govindarajan, V. Srinivasan, M. Kaul, and R. Vemuri, "An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi-FPGA Architectures", Reconfigurable Architectures Workshop, RAW'98, Springer Publ., pp.31-36.
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      cover image ACM Conferences
      DATE '00: Proceedings of the conference on Design, automation and test in Europe
      January 2000
      707 pages
      ISBN:1581132441
      DOI:10.1145/343647
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      • The Russian Academy of Sciences: The Russian Academy of Sciences

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      Published: 01 January 2000

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      DATE00: Design Automation and Test in Europe
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      • (2020)Keep the Phone in Your PocketProceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies10.1145/33973084:2(1-23)Online publication date: 15-Jun-2020
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      • (2013)Automated Partitioning for Partial Reconfiguration Design of Adaptive SystemsProceedings of the 2013 IEEE 27th International Symposium on Parallel and Distributed Processing Workshops and PhD Forum10.1109/IPDPSW.2013.119(172-181)Online publication date: 20-May-2013
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