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LHNN: lattice hypergraph neural network for VLSI congestion prediction

Published: 23 August 2022 Publication History

Abstract

Precise congestion prediction from a placement solution plays a crucial role in circuit placement. This work proposes the lattice hypergraph (LH-graph), a novel graph formulation for circuits, which preserves netlist data during the whole learning process, and enables the congestion information propagated geometrically and topologically. Based on the formulation, we further developed a heterogeneous graph neural network architecture LHNN, jointing the routing demand regression to support the congestion spot classification. LHNN constantly achieves more than 35% improvements compared with U-nets and Pix2Pix on the F1 score. We expect our work shall highlight essential procedures using machine learning for congestion prediction.

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Cited By

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  • (2024)A circuit domain generalization framework for efficient logic synthesis in chip designProceedings of the 41st International Conference on Machine Learning10.5555/3692070.3694123(50163-50207)Online publication date: 21-Jul-2024
  • (2024)PreRoutGNN for timing prediction with order preserving partitionProceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence and Thirty-Sixth Conference on Innovative Applications of Artificial Intelligence and Fourteenth Symposium on Educational Advances in Artificial Intelligence10.1609/aaai.v38i15.29653(17087-17095)Online publication date: 20-Feb-2024
  • (2024)RoutePlacer: An End-to-End Routability-Aware Placer with Graph Neural NetworkProceedings of the 30th ACM SIGKDD Conference on Knowledge Discovery and Data Mining10.1145/3637528.3671895(1085-1095)Online publication date: 25-Aug-2024
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cover image ACM Conferences
DAC '22: Proceedings of the 59th ACM/IEEE Design Automation Conference
July 2022
1462 pages
ISBN:9781450391429
DOI:10.1145/3489517
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 23 August 2022

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DAC '22: 59th ACM/IEEE Design Automation Conference
July 10 - 14, 2022
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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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Cited By

View all
  • (2024)A circuit domain generalization framework for efficient logic synthesis in chip designProceedings of the 41st International Conference on Machine Learning10.5555/3692070.3694123(50163-50207)Online publication date: 21-Jul-2024
  • (2024)PreRoutGNN for timing prediction with order preserving partitionProceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence and Thirty-Sixth Conference on Innovative Applications of Artificial Intelligence and Fourteenth Symposium on Educational Advances in Artificial Intelligence10.1609/aaai.v38i15.29653(17087-17095)Online publication date: 20-Feb-2024
  • (2024)RoutePlacer: An End-to-End Routability-Aware Placer with Graph Neural NetworkProceedings of the 30th ACM SIGKDD Conference on Knowledge Discovery and Data Mining10.1145/3637528.3671895(1085-1095)Online publication date: 25-Aug-2024
  • (2024)RAHP: A Redundancy-aware Accelerator for High-performance Hypergraph Neural Network2024 57th IEEE/ACM International Symposium on Microarchitecture (MICRO)10.1109/MICRO61859.2024.00094(1264-1277)Online publication date: 2-Nov-2024
  • (2024)MSANet: Congestion Prediction for Chip Routing Based on Multi-Scale Attention Network2024 3rd International Symposium on Semiconductor and Electronic Technology (ISSET)10.1109/ISSET62871.2024.10779655(587-592)Online publication date: 23-Aug-2024
  • (2024)A Lightweight Inception Boosted U-Net Neural Network for Routability Prediction2024 2nd International Symposium of Electronics Design Automation (ISEDA)10.1109/ISEDA62518.2024.10617987(648-653)Online publication date: 10-May-2024
  • (2024)Effective Heterogeneous Graph Neural Network for Routing Congestion Prediction2024 2nd International Symposium of Electronics Design Automation (ISEDA)10.1109/ISEDA62518.2024.10617734(369-373)Online publication date: 10-May-2024
  • (2024)Variational Label-Correlation Enhancement for Congestion PredictionProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473930(466-471)Online publication date: 22-Jan-2024
  • (2023)Circuit as set of pointsProceedings of the 37th International Conference on Neural Information Processing Systems10.5555/3666122.3667532(32468-32480)Online publication date: 10-Dec-2023
  • (2023)Bet-GAT: An Efficient Centrality-Based Graph Attention Model for Semi-Supervised Node ClassificationApplied Sciences10.3390/app1302084713:2(847)Online publication date: 7-Jan-2023
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