Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support
Authors: 
Chen Nie, Jie Lin, Huan Hu, Li Jiang, Xiaoyao Liang, Zhezhi HeAuthors Info & Claims
Pages 347 - 352
Abstract
This work presents HRAM, a SRAM-based hybrid memory bit-cell for energy-efficient in-memory computing purpose. The HRAM bit-cell consists of conventional 6T-SRAM for static data storage, and extra one accessing transistor and capacitor for caching data temporarily then conduct the computation within the HRAM array. As the Vector-Matrix Multiplication (VMM) is the dominant operation of neural network inference, performing the VMM in bit-serial fashion is a popular method in recent works. Meanwhile, there are two variants of bit-serial VMM, digital and analog VMM respectively, which fits for varying network topology (e.g., ResNet and MobileNet correspondingly). Through designing re-configurable sensing module and peripherals, our HRAM can be configured to conduct both DVMM and AVMM efficiently. With 65nm technology, the cross-layer simulation indicates that the HRAM based in-memory computing accelerator outperforms the state-of-the-art CSRAM and MBC design by 1.94×/1.81× and 1.95×/11× respectively, in energy efficiency for ResNet-50/MobileNet-V2.
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We propose the Hybrid-RAM (HRAM). It's a low power process-in-memory design that support both analog and digital in-memory computing, which makes it efficient and still flexible. Analog and digital modes are expert at different applications, and cannot be a general solution. However, the switching of HRAM, makes it could always obtain the best performance in any case. Compared with the state-of-the-art MBC and CSRAM, HRAM could get decent performance in most cases, and could get the best performance adaptively in any case.
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Published In
June 2021
504 pages
ISBN:9781450383936
DOI:10.1145/3453688
- General Chairs:
- Yiran Chen,
- Victor Zhirnov,
- Program Chairs:
- Avesta Sasan,
- Ioannis Savidis
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Published: 22 June 2021
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We propose the Hybrid-RAM (HRAM). It's a low power process-in-memory design that support both analog and digital in-memory computing, which makes it efficient and still flexible. Analog and digital modes are expert at different applications, and cannot be a general solution. However, the switching of HRAM, makes it could always obtain the best performance in any case. Compared with the state-of-the-art MBC and CSRAM, HRAM could get decent performance in most cases, and could get the best performance adaptively in any case. https://dl.acm.org/doi/10.1145/3453688.3461528#meeting_02.mp4
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