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CAMeleon: Reconfigurable B(T)CAM in Computational RAM

Authors:

Zamshed I. Chowdhury,

Hüsrev Cilasun,

Zhengyang Zhao,

Sachin S. Sapatnekar,

Jian-Ping Wang,

Ulya R. KarpuzcuAuthors Info & Claims

GLSVLSI '21: Proceedings of the 2021 Great Lakes Symposium on VLSI

Pages 57 - 63

https://doi.org/10.1145/3453688.3461507

Published: 22 June 2021 Publication History

Abstract

Embedded/edge computing comes with a very stringent hardware resource (area) budget and a need for extreme energy efficiency. This motivates repurposing, i.e., reconfiguring hardware resources on demand, where the overhead of reconfiguration itself is subject to the very same tight budgets in area and energy efficiency. Numerous applications running on resource constrained environments such as wearable devices and Internet-of-Things incorporate CAM (Content Addressable Memory) as a key computational building block. In this paper we present CAMeleon -- a novel energy-efficient compute substrate which can seamlessly be reconfigured to perform CAM operations in addition to logic and memory functions. CAMeleon has a similar level of latency to conventional CAM designs based on SRAM and emerging memory technologies (such as STT-MTJ, ReRAM and PCM), however, performs CAM operations more energy-efficiently, consumes less area, and can support traditional logic and memory functions beyond CAM operations on demand thanks to its reconfigurability.

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Cited By

Lv YWang J(2024)Manufacturability Evaluation of Magnetic Tunnel Junction-Based Computational Random Access MemoryIEEE Transactions on Magnetics10.1109/TMAG.2023.332393560:5(1-7)Online publication date: May-2024
https://doi.org/10.1109/TMAG.2023.3323935
Lv YZink BBloom RCılasun HKhanal PResch SChowdhury ZHabiboglu AWang WSapatnekar SKarpuzcu UWang J(2024)Experimental demonstration of magnetic tunnel junction-based computational random-access memorynpj Unconventional Computing10.1038/s44335-024-00003-31:1Online publication date: 25-Jul-2024
https://doi.org/10.1038/s44335-024-00003-3

Index Terms

CAMeleon: Reconfigurable B(T)CAM in Computational RAM
1. Hardware
  1. Emerging technologies

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Published In

cover image ACM Conferences

GLSVLSI '21: Proceedings of the 2021 Great Lakes Symposium on VLSI

June 2021

504 pages

ISBN:9781450383936

DOI:10.1145/3453688

General Chairs:
Yiran Chen
Duke University, USA
,
Victor Zhirnov
Semiconductor Research Corporation, USA
,
Program Chairs:
Avesta Sasan
George Mason University, USA
,
Ioannis Savidis
Drexel University, USA

Copyright © 2021 ACM.

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Publication History

Published: 22 June 2021

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GLSVLSI '21

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GLSVLSI '21: Great Lakes Symposium on VLSI 2021

June 22 - 25, 2021

Virtual Event, USA

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Cited By

Lv YWang J(2024)Manufacturability Evaluation of Magnetic Tunnel Junction-Based Computational Random Access MemoryIEEE Transactions on Magnetics10.1109/TMAG.2023.332393560:5(1-7)Online publication date: May-2024
https://doi.org/10.1109/TMAG.2023.3323935
Lv YZink BBloom RCılasun HKhanal PResch SChowdhury ZHabiboglu AWang WSapatnekar SKarpuzcu UWang J(2024)Experimental demonstration of magnetic tunnel junction-based computational random-access memorynpj Unconventional Computing10.1038/s44335-024-00003-31:1Online publication date: 25-Jul-2024
https://doi.org/10.1038/s44335-024-00003-3

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