research-article

Exploiting Disturbance-Aware Read Redirection for Performance Improvement in 3D Flash Memory

Authors:

Jianhang Huang,

Laurence T. YangAuthors Info & Claims

GLSVLSI '20: Proceedings of the 2020 on Great Lakes Symposium on VLSI

Pages 95 - 100

https://doi.org/10.1145/3386263.3406921

Published: 07 September 2020 Publication History

Abstract

Three-dimensional (3D) NAND flash memory has been widely adopted in emerging storage systems, ranging from mobile devices to cloud systems, due to its performance benefits and scalability. While 3D flash improves capacity through stacking more cells in the vertical direction, the read disturbance has become a serious reliability concern to develop 3D flash memory in storage devices, especially for read-intensive applications. To address the above challenge, we propose a novel disturbance-aware read redirection scheme (DRR). By exploiting parity-based redundancy and data duplication to regenerate data content, DRR redirects reads from strong disturbed flash blocks to weak ones without any data replication. DRR makes the redirection decision based on the accumulative read disturbance, data redundancy, data duplication, and the current I/O traffic. Results show that DRR provides as much as 24.6% performance improvement in the average read/write response time, and extends the endurance of 3D flash devices by 4.7%.

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Cited By

Lv YShi LLi QGao CSong YLuo LZhang Y(2023)MGC: Multiple-Gray-Code for 3D NAND Flash based High-Density SSDs2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10070946(122-136)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10070946
Sha ZLi JCai ZHuang MLiao JTrahay F(2022)Degraded Mode-benefited I/O Scheduling to Ensure I/O Responsiveness in RAID-enabled SSDsACM Transactions on Design Automation of Electronic Systems10.1145/352275527:6(1-24)Online publication date: 22-Nov-2022
https://dl.acm.org/doi/10.1145/3522755
Li QYe MCui YRen TKuo TXue C(2022)Resolving the Reliability Issues of Open Blocks for 3-D NAND Flash: Observations and StrategiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319748741:11(4076-4087)Online publication date: Nov-2022
https://doi.org/10.1109/TCAD.2022.3197487
Show More Cited By

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Exploiting Disturbance-Aware Read Redirection for Performance Improvement in 3D Flash Memory

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cover image ACM Other conferences

GLSVLSI '20: Proceedings of the 2020 on Great Lakes Symposium on VLSI

September 2020

597 pages

ISBN:9781450379441

DOI:10.1145/3386263

General Chairs:
Tinoosh Mohsenin
University of Maryland, Baltimore County, USA
,
Weisheng Zhao
Beihang University, China
,
Program Chairs:
Yiran Chen
Duke University, USA
,
Onur Mutlu
ETH Zurich, Switzerland

Copyright © 2020 ACM.

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Published: 07 September 2020

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National Natural Science Foundation of China
Hubei Provincial Natural Science Foundation of China
National Key Research and Development Program of China
Fundamental Research Funds for the Central Universities

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GLSVLSI '20

GLSVLSI '20: Great Lakes Symposium on VLSI 2020

September 7 - 9, 2020

Virtual Event, China

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Overall Acceptance Rate 312 of 1,156 submissions, 27%

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Cited By

Lv YShi LLi QGao CSong YLuo LZhang Y(2023)MGC: Multiple-Gray-Code for 3D NAND Flash based High-Density SSDs2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA56546.2023.10070946(122-136)Online publication date: Feb-2023
https://doi.org/10.1109/HPCA56546.2023.10070946
Sha ZLi JCai ZHuang MLiao JTrahay F(2022)Degraded Mode-benefited I/O Scheduling to Ensure I/O Responsiveness in RAID-enabled SSDsACM Transactions on Design Automation of Electronic Systems10.1145/352275527:6(1-24)Online publication date: 22-Nov-2022
https://dl.acm.org/doi/10.1145/3522755
Li QYe MCui YRen TKuo TXue C(2022)Resolving the Reliability Issues of Open Blocks for 3-D NAND Flash: Observations and StrategiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.319748741:11(4076-4087)Online publication date: Nov-2022
https://doi.org/10.1109/TCAD.2022.3197487
Cui JLiu CLiu JHuang JYang L(2022)Exploiting Uncorrectable Data Reuse for Performance Improvement of Flash MemoryIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2021.310031041:6(1785-1798)Online publication date: Jun-2022
https://doi.org/10.1109/TCAD.2021.3100310

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