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View all- Song HNepal KBahar RGrodstein J(2006)Timing analysis for full-custom circuits using symbolic DC formulationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2005.85951025:9(1815-1830)Online publication date: 1-Sep-2006
- Junjie Yang Tan S(2004)Behavioural modelling of analog circuits by dynamic semi-symbolic analysis2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512)10.1109/ISCAS.2004.1329469(V-105-V-108)Online publication date: 2004
- Bhattacharya SShi C(2003)Concurrent logic and interconnect delay estimation of MOS circuits by mixed algebraic and Boolean symbolic analysisProceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.10.1109/ISCAS.2003.1206183(IV-660-IV-663)Online publication date: 2003
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