research-article

A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits

Authors:

Nobuyuki Yoshikawa,

Yanzhi WangAuthors Info & Claims

GLSVLSI '19: Proceedings of the 2019 Great Lakes Symposium on VLSI

Pages 189 - 194

https://doi.org/10.1145/3299874.3317980

Published: 13 May 2019 Publication History

Abstract

Adiabatic Quantum-Flux-Parametron (AQFP) logic is an adiabatic superconductor logic that has been proposed as alternative to CMOS logic with extremely high energy efficiency. In AQFP technology, majority-based gates have the same area as two-input AND/OR gates while offering more complex logic. Therefore, majority-based logic (MAJ) is more preferred than and-or-inverter-based logic (AOI) to implement logic functions in AQFP for higher energy efficiency. In this paper, we propose a majority gates synthesis framework for AQFP circuits that is capable of converting any AOI netlist to its corresponding MAJ netlist by mapping all feasible three-input sub- netlists to corresponding MAJ based implementations. In addition, the proposed tool can insert the optimal amount of buffers and splitters for equivalent delay as required in the AQFP technology. Experimental results suggest that the proposed method can reduce delay and area by up to 60.00% and 60.98%, respectively.

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Cited By

Xie YDong PYuan GLi ZZabihi MWu CChang SZhang XLin XDing CYoshikawa NChen OWang Y(2024)SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum- Flux - Parametron Superconducting Circuits2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546680(1-6)Online publication date: 25-Mar-2024
https://doi.org/10.23919/DATE58400.2024.10546680
Wu BMak WHui-Ru Jiang IPosser G(2024)Optimization for Buffer and Splitter Insertion in AQFP Circuits with Local and Group MovementProceedings of the 2024 International Symposium on Physical Design10.1145/3626184.3633323(255-262)Online publication date: 12-Mar-2024
https://dl.acm.org/doi/10.1145/3626184.3633323
Marakkalage DDe Micheli G(2024)Fanout-Bounded Logic Synthesis for Emerging TechnologiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.333944043:5(1415-1428)Online publication date: May-2024
https://doi.org/10.1109/TCAD.2023.3339440
Show More Cited By

Index Terms

A Majority Logic Synthesis Framework for Adiabatic Quantum-Flux-Parametron Superconducting Circuits
1. Hardware
  1. Electronic design automation
    1. Logic synthesis
      1. Combinational synthesis
  2. Emerging technologies
    1. Quantum technologies

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cover image ACM Conferences

GLSVLSI '19: Proceedings of the 2019 Great Lakes Symposium on VLSI

May 2019

562 pages

ISBN:9781450362528

DOI:10.1145/3299874

General Chairs:
Houman Homayoun
George Mason University, USA
,
Baris Taskin
Drexel University, USA
,
Program Chairs:
Tinoosh Mohsenin
UMBC, USA
,
Weisheng Zhao
Beihang University, China

Copyright © 2019 ACM.

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Published: 13 May 2019

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GLSVLSI '19: Great Lakes Symposium on VLSI 2019

May 9 - 11, 2019

VA, Tysons Corner, USA

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Cited By

Xie YDong PYuan GLi ZZabihi MWu CChang SZhang XLin XDing CYoshikawa NChen OWang Y(2024)SuperFlow: A Fully-Customized RTL-to-GDS Design Automation Flow for Adiabatic Quantum- Flux - Parametron Superconducting Circuits2024 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE58400.2024.10546680(1-6)Online publication date: 25-Mar-2024
https://doi.org/10.23919/DATE58400.2024.10546680
Wu BMak WHui-Ru Jiang IPosser G(2024)Optimization for Buffer and Splitter Insertion in AQFP Circuits with Local and Group MovementProceedings of the 2024 International Symposium on Physical Design10.1145/3626184.3633323(255-262)Online publication date: 12-Mar-2024
https://dl.acm.org/doi/10.1145/3626184.3633323
Marakkalage DDe Micheli G(2024)Fanout-Bounded Logic Synthesis for Emerging TechnologiesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.333944043:5(1415-1428)Online publication date: May-2024
https://doi.org/10.1109/TCAD.2023.3339440
Bairamkulov RDe Micheli G(2024)Superconductive Electronics: A 25-Year Review [Feature]IEEE Circuits and Systems Magazine10.1109/MCAS.2024.337649224:2(16-33)Online publication date: Oct-2025
https://doi.org/10.1109/MCAS.2024.3376492
Fu RHuang JWang MNobuyuki YYu BHo TChen O(2023)BOMIG: A Majority Logic Synthesis Framework for AQFP Logic2023 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE56975.2023.10137075(1-2)Online publication date: Apr-2023
https://doi.org/10.23919/DATE56975.2023.10137075
Li ZYuan GYamauchi TMasoud ZXie YDong PTang XYoshikawa NTiwari DWang YChen O(2023)SupeRBNN: Randomized Binary Neural Network Using Adiabatic Superconductor Josephson DevicesProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3623771(584-598)Online publication date: 28-Oct-2023
https://dl.acm.org/doi/10.1145/3613424.3623771
Calvino ADe Micheli GTakahashi A(2023)Depth-Optimal Buffer and Splitter Insertion and Optimization in AQFP CircuitsProceedings of the 28th Asia and South Pacific Design Automation Conference10.1145/3566097.3567895(152-158)Online publication date: 16-Jan-2023
https://dl.acm.org/doi/10.1145/3566097.3567895
Fourie CJackman KDelport JSchindler LHall TFebvre PIwanikow LChen OAyala CYoshikawa NLaw MWeingartner TWang YBeerel PGupta SZha HRazmkhah SKaramuftuoglu MFayyazi ALi MAnnavaram MNazarian SPedram M(2023)Results From the ColdFlux Superconductor Integrated Circuit Design Tool ProjectIEEE Transactions on Applied Superconductivity10.1109/TASC.2023.330638133:8(1-26)Online publication date: Nov-2023
https://doi.org/10.1109/TASC.2023.3306381
Li ZXie YDong PChen OWang Y(2023)Invited: Algorithm-Software-Hardware Co-Design for Deep Learning Acceleration2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247939(1-4)Online publication date: 9-Jul-2023
https://doi.org/10.1109/DAC56929.2023.10247939
Chen OLi ZYamauchi TWang YYoshikawa N(2023)Performance Assessment of an Extremely Energy-Efficient Binary Neural Network Using Adiabatic Superconductor Devices2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS)10.1109/AICAS57966.2023.10168607(1-5)Online publication date: 11-Jun-2023
https://doi.org/10.1109/AICAS57966.2023.10168607
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