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A System-Level Simulator for RRAM-Based Neuromorphic Computing Chips

Authors:

Matthew Kay Fei Lee,

Thannirmalai Somu,

Rick Siow Mong GohAuthors Info & Claims

ACM Transactions on Architecture and Code Optimization (TACO), Volume 15, Issue 4

Article No.: 64, Pages 1 - 24

https://doi.org/10.1145/3291054

Published: 08 January 2019 Publication History

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Abstract

Advances in non-volatile resistive switching random access memory (RRAM) have made it a promising memory technology with potential applications in low-power and embedded in-memory computing devices owing to a number of advantages such as low-energy consumption, low area cost and good scaling. There have been proposals to employ RRAM in architecting chips for neuromorphic computing and artificial neural networks where matrix-vector multiplication can be computed in the analog domain in a single timestep. However, it is challenging to employ RRAM devices in neuromorphic chips owing to the non-ideal behavior of RRAM. In this article, we propose a cycle-accurate and scalable system-level simulator that can be used to study the effects of using RRAM devices in neuromorphic computing chips. The simulator models a spatial neuromorphic chip architecture containing many neural cores with RRAM crossbars connected via a Network-on-Chip (NoC). We focus on system-level simulation and demonstrate the effectiveness of our simulator in understanding how non-linear RRAM effects such as stuck-at-faults (SAFs), write variability, and random telegraph noise (RTN) can impact an application’s behavior. By using our simulator, we show that RTN and write variability can have adverse effects on an application. Nevertheless, we show that these effects can be mitigated through proper design choices and the implementation of a write-verify scheme.

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Cited By

Kim MKim S(2024)From Oxides to 2D Materials: Advancing Memristor Technologies for Energy-Efficient Neuromorphic ComputingACS Applied Electronic Materials10.1021/acsaelm.4c004286:6(3998-4015)Online publication date: 30-May-2024
https://doi.org/10.1021/acsaelm.4c00428
Zhang HHo NPolat DChen PWahib MNguyen TMeng JGoh RMatsuoka SLuo TWong W(2023)Simeuro: A Hybrid CPU-GPU Parallel Simulator for Neuromorphic Computing ChipsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2023.329179534:10(2767-2782)Online publication date: Oct-2023
https://doi.org/10.1109/TPDS.2023.3291795
Wei MYayla MHo SChen JAmrouch HYang C(2023)Impact of Non-Volatile Memory Cells on Spiking Neural Network Annealing Machine With In-Situ Synapse ProcessingIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2023.330501070:11(4380-4393)Online publication date: Nov-2023
https://doi.org/10.1109/TCSI.2023.3305010
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A System-Level Simulator for RRAM-Based Neuromorphic Computing Chips

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Published In

cover image ACM Transactions on Architecture and Code Optimization

ACM Transactions on Architecture and Code Optimization Volume 15, Issue 4

December 2018

706 pages

ISSN:1544-3566

EISSN:1544-3973

DOI:10.1145/3284745

Editor:
Koen De Bosschere
Ghent University

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Copyright © 2019 ACM.

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Publication History

Published: 08 January 2019

Accepted: 01 October 2018

Revised: 01 September 2018

Received: 01 May 2018

Published in TACO Volume 15, Issue 4

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Cited By

Kim MKim S(2024)From Oxides to 2D Materials: Advancing Memristor Technologies for Energy-Efficient Neuromorphic ComputingACS Applied Electronic Materials10.1021/acsaelm.4c004286:6(3998-4015)Online publication date: 30-May-2024
https://doi.org/10.1021/acsaelm.4c00428
Zhang HHo NPolat DChen PWahib MNguyen TMeng JGoh RMatsuoka SLuo TWong W(2023)Simeuro: A Hybrid CPU-GPU Parallel Simulator for Neuromorphic Computing ChipsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2023.329179534:10(2767-2782)Online publication date: Oct-2023
https://doi.org/10.1109/TPDS.2023.3291795
Wei MYayla MHo SChen JAmrouch HYang C(2023)Impact of Non-Volatile Memory Cells on Spiking Neural Network Annealing Machine With In-Situ Synapse ProcessingIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2023.330501070:11(4380-4393)Online publication date: Nov-2023
https://doi.org/10.1109/TCSI.2023.3305010
Park JShin YSung H(2023)Multi-Objective Architecture Search and Optimization for Heterogeneous Neuromorphic Architecture2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)10.1109/ICCAD57390.2023.10323779(1-8)Online publication date: 28-Oct-2023
https://doi.org/10.1109/ICCAD57390.2023.10323779
Xie LXue JWu LChen FTian QZhou YYing RLiu P(2023)SpikeNC: An Accurate and Scalable Simulator for Spiking Neural Network on Multi-Core Neuromorphic Hardware2023 IEEE 30th International Conference on High Performance Computing, Data, and Analytics (HiPC)10.1109/HiPC58850.2023.00052(357-366)Online publication date: 18-Dec-2023
https://doi.org/10.1109/HiPC58850.2023.00052
Zhang JZhang JHuo DChen H(2023)ANAS: Asynchronous Neuromorphic Hardware Architecture Search Based on a System-Level Simulator2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247850(1-6)Online publication date: 9-Jul-2023
https://doi.org/10.1109/DAC56929.2023.10247850
Song MKang JZhang XJi WAscoli AMessaris IDemirkol ADong BAggarwal SWan WHong SCardwell SBoybat ISeo JLee JLanza MYeon HOnen MLi JYildiz Bdel Alamo JKim SChoi SMilano GRicciardi CAlff LChai YWang ZBhaskaran HHersam MStrukov DWong HValov IGao BWu HTetzlaff RSebastian ALu WChua LYang JKim J(2023)Recent Advances and Future Prospects for Memristive Materials, Devices, and SystemsACS Nano10.1021/acsnano.3c0350517:13(11994-12039)Online publication date: 29-Jun-2023
https://doi.org/10.1021/acsnano.3c03505
Yang KYin ZWu JDeng HYang ZFan ZZhao J(2023)Ultra-low power resistive random-access memory based on VO2/TiO2 nanotubes composite filmVacuum10.1016/j.vacuum.2023.112472216(112472)Online publication date: Oct-2023
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Mysore NHota GDeiss SPedroni BCauwenberghs G(2022)Hierarchical Network Connectivity and Partitioning for Reconfigurable Large-Scale Neuromorphic SystemsFrontiers in Neuroscience10.3389/fnins.2021.79765415Online publication date: 31-Jan-2022
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Zahedi MLebdeh MBengel CWouters DMenzel SLe Gallo MSebastian AWong SHamdioui S(2022)MNEMOSENE: Tile Architecture and Simulator for Memristor-based Computation-in-memoryACM Journal on Emerging Technologies in Computing Systems10.1145/348582418:3(1-24)Online publication date: 29-Jan-2022
https://dl.acm.org/doi/10.1145/3485824
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