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Aging-aware chip health prediction adopting an innovative monitoring strategy

Published: 21 January 2019 Publication History

Abstract

Concerns exist that the reliability of chips is worsening because of downscaling technology. Among various reliability challenges, device aging is a dominant concern because it degrades circuit performance over time. Traditionally, runtime monitoring approaches are proposed to estimate aging effects. However, such techniques tend to predict and monitor delay degradation status for circuit mitigation measures rather than the health condition of the chip. In this paper, we propose an aging-aware chip health prediction methodology that adapts to workload conditions and process, supply voltage, and temperature variations. Our prediction methodology adopts an innovative on-chip delay monitoring strategy by tracing representative aging-aware delay behavior. The delay behavior is then fed into a machine learning engine to predict the age of the tested chips. Experimental results indicate that our strategy can obtain 97.40% accuracy with 4.14% area overhead on average. To the authors' knowledge, this is the first method that accurately predicts current chip age and provides information regarding future chip health.

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Cited By

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  • (2022)Brain-Inspired Computing for Circuit Reliability CharacterizationIEEE Transactions on Computers10.1109/TC.2022.3151857(1-1)Online publication date: 2022
  • (2022)ML-Based Aging Monitoring and Lifetime Prediction of IoT Devices With Cost-Effective Embedded Tags for Edge and Cloud OperabilityIEEE Internet of Things Journal10.1109/JIOT.2021.31160659:10(7433-7445)Online publication date: 15-May-2022
  • (2021)A Novel NBTI-Aware Chip Remaining Lifetime Prediction Framework Using Machine Learning2021 22nd International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED51717.2021.9424356(476-481)Online publication date: 7-Apr-2021
  • Show More Cited By

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Published In

cover image ACM Conferences
ASPDAC '19: Proceedings of the 24th Asia and South Pacific Design Automation Conference
January 2019
794 pages
ISBN:9781450360074
DOI:10.1145/3287624
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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  • IEICE ESS: Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
  • IEEE CAS
  • IEEE CEDA
  • IPSJ SIG-SLDM: Information Processing Society of Japan, SIG System LSI Design Methodology

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 21 January 2019

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Author Tags

  1. aging
  2. and temperature (PVT) variation
  3. bias-temperature instability
  4. chip health prediction
  5. process
  6. support vector machine (SVM)
  7. voltage
  8. workload

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ASPDAC '19
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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

View all
  • (2022)Brain-Inspired Computing for Circuit Reliability CharacterizationIEEE Transactions on Computers10.1109/TC.2022.3151857(1-1)Online publication date: 2022
  • (2022)ML-Based Aging Monitoring and Lifetime Prediction of IoT Devices With Cost-Effective Embedded Tags for Edge and Cloud OperabilityIEEE Internet of Things Journal10.1109/JIOT.2021.31160659:10(7433-7445)Online publication date: 15-May-2022
  • (2021)A Novel NBTI-Aware Chip Remaining Lifetime Prediction Framework Using Machine Learning2021 22nd International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED51717.2021.9424356(476-481)Online publication date: 7-Apr-2021
  • (2021)BIST Based Aging Fault Prediction Using Machine Learning2021 Second International Conference on Electronics and Sustainable Communication Systems (ICESC)10.1109/ICESC51422.2021.9532739(1715-1722)Online publication date: 4-Aug-2021
  • (2019)Multi-Step-Ahead Prediction for a CMOS Low Noise Amplifier Aging Due to NBTI and HCI Using Neural NetworksJournal of Electronic Testing10.1007/s10836-019-05843-7Online publication date: 11-Dec-2019

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