research-article

Maximizing power state cross coverage in firmware-based power management

Authors:

Vladimir Herdt,

Rolf DrechslerAuthors Info & Claims

ASPDAC '19: Proceedings of the 24th Asia and South Pacific Design Automation Conference

Pages 335 - 340

https://doi.org/10.1145/3287624.3287631

Published: 21 January 2019 Publication History

Abstract

Virtual Prototypes (VPs) are becoming increasingly attractive for the early analysis of SoC power management, which is nowadays mostly implemented in firmware (FW). Power and timing constraints can be monitored and validated by executing a set of test-cases in a power-aware FW/VP co-simulation. In this context, cross coverage of power states is an effective but challenging quality metric. This paper proposes a novel coverage-driven approach to automatically generate test-cases maximizing this cross coverage. In particular, we integrate a coverage-loop that successively refines the generation process based on previous results. We demonstrate our approach on a LEON3-based VP.

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Cited By

Herdt VGroße DDrechsler RHerdt VGroße DDrechsler R(2023)Validierung von Firmware-basiertem Power Management mit virtuellen PrototypenVerbessertes virtuelles Prototyping10.1007/978-3-031-18174-0_7(189-219)Online publication date: 1-Jan-2023
https://doi.org/10.1007/978-3-031-18174-0_7
Herdt VDrechsler R(2021)Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challengesScience China Information Sciences10.1007/s11432-020-3308-465:1Online publication date: 23-Dec-2021
https://doi.org/10.1007/s11432-020-3308-4
Herdt VGrose DDrechsler R(2020) Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes * 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116522(618-621)Online publication date: Mar-2020
https://doi.org/10.23919/DATE48585.2020.9116522
Show More Cited By

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cover image ACM Conferences

ASPDAC '19: Proceedings of the 24th Asia and South Pacific Design Automation Conference

January 2019

794 pages

ISBN:9781450360074

DOI:10.1145/3287624

General Chair:
Toshiyuki Shibuya
Fujitsu Laboratories

Copyright © 2019 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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IEICE ESS: Institute of Electronics, Information and Communication Engineers, Engineering Sciences Society
IEEE CAS
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IPSJ SIG-SLDM: Information Processing Society of Japan, SIG System LSI Design Methodology

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 21 January 2019

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Bundesministerium für Bildung und Forschung

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ASPDAC '19

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SIGDA

ASPDAC '19: 24th Asia and South Pacific Design Automation Conference

January 21 - 24, 2019

Tokyo, Japan

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

Herdt VGroße DDrechsler RHerdt VGroße DDrechsler R(2023)Validierung von Firmware-basiertem Power Management mit virtuellen PrototypenVerbessertes virtuelles Prototyping10.1007/978-3-031-18174-0_7(189-219)Online publication date: 1-Jan-2023
https://doi.org/10.1007/978-3-031-18174-0_7
Herdt VDrechsler R(2021)Advanced virtual prototyping for cyber-physical systems using RISC-V: implementation, verification and challengesScience China Information Sciences10.1007/s11432-020-3308-465:1Online publication date: 23-Dec-2021
https://doi.org/10.1007/s11432-020-3308-4
Herdt VGrose DDrechsler R(2020) Fast and Accurate Performance Evaluation for RISC-V using Virtual Prototypes * 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE48585.2020.9116522(618-621)Online publication date: Mar-2020
https://doi.org/10.23919/DATE48585.2020.9116522
Herdt VDrechsler R(2020)Efficient Techniques to Strongly Enhance the Virtual Prototype Based Design Flow2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI49217.2020.00041(182-187)Online publication date: Jul-2020
https://doi.org/10.1109/ISVLSI49217.2020.00041
Lemma DGoli MGrose DDrechsler R(2020)Towards Generation of a Programmable Power Management Unit at the Electronic System Level2020 23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)10.1109/DDECS50862.2020.9095712(1-6)Online publication date: Apr-2020
https://doi.org/10.1109/DDECS50862.2020.9095712
Drechlser RGrosse D(2019)Ensuring Correctness of Next Generation Devices: From Reconfigurable to Self-Learning Systems2019 IEEE 28th Asian Test Symposium (ATS)10.1109/ATS47505.2019.00029(159-1595)Online publication date: Dec-2019
https://doi.org/10.1109/ATS47505.2019.00029

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