research-article

Review of Neuro-Space Mapping Method for Transistor Modeling

Authors:

Shuxia Yan,

Xu Dong,

Xiaoyi Jin,

Weiguang Shi,

Wei XuAuthors Info & Claims

EEET '18: Proceedings of the 2018 International Conference on Electronics and Electrical Engineering Technology

Pages 97 - 101

https://doi.org/10.1145/3277453.3277473

Published: 19 September 2018 Publication History

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Abstract

This paper reviews the nonlinear microwave device modeling technology based on Neuro-Space Mapping (Neuro-SM). We mainly introduce two kinds of Neuro-SM models: the Neuro-SM model with input mapping network and the Neuro-SM model with output mapping network. Compared with the traditional equivalent circuit model, the Neuro-SM models are more accurate. Measurement data of the RF power laterally diffuse metal-oxide semiconductor (LDMOS) transistor and InP HEMT transistor are used as the application examples to verify the reviewed two Neuro-SM models can accurately reflect the characteristics of transistors with simple operation process and enhance the accuracy of the existing model.

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Yan SZhang SDong X(2020)Review of Neuro-Space Mapping Modeling for Packaged Transistors2020 13th UK-Europe-China Workshop on Millimetre-Waves and Terahertz Technologies (UCMMT)10.1109/UCMMT49983.2020.9296025(1-3)Online publication date: 29-Aug-2020
https://doi.org/10.1109/UCMMT49983.2020.9296025

Index Terms

Review of Neuro-Space Mapping Method for Transistor Modeling
1. Computing methodologies
  1. Modeling and simulation
    1. Model development and analysis
      1. Modeling methodologies

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EEET '18: Proceedings of the 2018 International Conference on Electronics and Electrical Engineering Technology

September 2018

246 pages

ISBN:9781450365413

DOI:10.1145/3277453

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 19 September 2018

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EEET '18: 2018 International Conference on Electronics and Electrical Engineering Technology

September 19 - 21, 2018

Tianjin, China

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Yan SZhang SDong X(2020)Review of Neuro-Space Mapping Modeling for Packaged Transistors2020 13th UK-Europe-China Workshop on Millimetre-Waves and Terahertz Technologies (UCMMT)10.1109/UCMMT49983.2020.9296025(1-3)Online publication date: 29-Aug-2020
https://doi.org/10.1109/UCMMT49983.2020.9296025

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Modeling the threshold voltage of PNIN SSOI tunnel field-effect transistor

Modeling and Analysis of Leakage Currents in Double-Gate Technologies

Pass transistor operation modeling for nanoscale technologies

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