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DL-RSIM: A Simulation Framework to Enable Reliable ReRAM-based Accelerators for Deep Learning

Published: 05 November 2018 Publication History

Abstract

Memristor-based deep learning accelerators provide a promising solution to improve the energy efficiency of neuromorphic computing systems. However, the electrical properties and crossbar structure of memristors make these accelerators error-prone. To enable reliable memristor-based accelerators, a simulation platform is needed to precisely analyze the impact of non-ideal circuit and device properties on the inference accuracy. In this paper, we propose a flexible simulation framework, DL-RSIM, to tackle this challenge. DL-RSIM simulates the error rates of every sum-of-products computation in the memristor-based accelerator and injects the errors in the targeted TensorFlow-based neural network model. A rich set of reliability impact factors are explored by DL-RSIM, and it can be incorporated with any deep learning neural network implemented by TensorFlow. Using three representative convolutional neural networks as case studies, we show that DL-RSIM can guide chip designers to choose a reliability-friendly design option and develop reliability optimization techniques.

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Cited By

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  • (2024)Static Scheduling of Weight Programming for DNN Acceleration with Resource Constrained PIMACM Transactions on Embedded Computing Systems10.1145/361565723:6(1-22)Online publication date: 11-Sep-2024
  • (2024)CoMN: Algorithm-Hardware Co-Design Platform for Nonvolatile Memory-Based Convolutional Neural Network AcceleratorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.335822043:7(2043-2056)Online publication date: Jul-2024
  • (2024)PyMem: A Graphical User Interface Tool for Neuromemristive Hardware–Software Co-DesignIEEE Open Journal of the Industrial Electronics Society10.1109/OJIES.2024.33630935(81-90)Online publication date: 2024
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              cover image Guide Proceedings
              2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
              Nov 2018
              939 pages

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              IEEE Press

              Publication History

              Published: 05 November 2018

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              View all
              • (2024)Static Scheduling of Weight Programming for DNN Acceleration with Resource Constrained PIMACM Transactions on Embedded Computing Systems10.1145/361565723:6(1-22)Online publication date: 11-Sep-2024
              • (2024)CoMN: Algorithm-Hardware Co-Design Platform for Nonvolatile Memory-Based Convolutional Neural Network AcceleratorsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.335822043:7(2043-2056)Online publication date: Jul-2024
              • (2024)PyMem: A Graphical User Interface Tool for Neuromemristive Hardware–Software Co-DesignIEEE Open Journal of the Industrial Electronics Society10.1109/OJIES.2024.33630935(81-90)Online publication date: 2024
              • (2024)CraftRGP: A Comprehensive Reliability Analysis Framework Towards ReRAM-Based Graph Processing2024 IEEE International Test Conference in Asia (ITC-Asia)10.1109/ITC-Asia62534.2024.10661337(1-6)Online publication date: 18-Aug-2024
              • (2024)ReShare: A Resource-Efficient Weight Pattern Sharing Scheme for Memristive DNN Accelerators2024 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS58744.2024.10558167(1-5)Online publication date: 19-May-2024
              • (2024)ReAIM: A ReRAM-based Adaptive Ising Machine for Solving Combinatorial Optimization Problems2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA)10.1109/ISCA59077.2024.00015(58-72)Online publication date: 29-Jun-2024
              • (2024)Hardware implementation of memristor-based artificial neural networksNature Communications10.1038/s41467-024-45670-915:1Online publication date: 4-Mar-2024
              • (2023)A Design Methodology for Fault-Tolerant Neuromorphic Computing Using Bayesian Neural NetworkMicromachines10.3390/mi1410184014:10(1840)Online publication date: 27-Sep-2023
              • (2023)Swordfish: A Framework for Evaluating Deep Neural Network-based Basecalling using Computation-In-Memory with Non-Ideal MemristorsProceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture10.1145/3613424.3614252(1437-1452)Online publication date: 28-Oct-2023
              • (2023)An Accelerated Variable Stage Size Carry Skip Adder Realization Using 1S1R Resistive MemoryInternational Journal of Information Technology & Decision Making10.1142/S021962202350041423:03(1335-1365)Online publication date: 23-May-2023
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