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On the complexity of hazard-free circuits

Published: 20 June 2018 Publication History

Abstract

The problem of constructing hazard-free Boolean circuits dates back to the 1940s and is an important problem in circuit design. Our main lower-bound result unconditionally shows the existence of functions whose circuit complexity is polynomially bounded while every hazard-free implementation is provably of exponential size. Previous lower bounds on the hazard-free complexity were only valid for depth 2 circuits. The same proof method yields that every subcubic implementation of Boolean matrix multiplication must have hazards. These results follow from a crucial structural insight: Hazard-free complexity is a natural generalization of monotone complexity to all (not necessarily monotone) Boolean functions. Thus, we can apply known monotone complexity lower bounds to find lower bounds on the hazard-free complexity. We also lift these methods from the monotone setting to prove exponential hazard-free complexity lower bounds for non-monotone functions.
As our main upper-bound result we show how to efficiently convert a Boolean circuit into a bounded-bit hazard-free circuit with only a polynomially large blow-up in the number of gates. Previously, the best known method yielded exponentially large circuits in the worst case, so our algorithm gives an exponential improvement.
As a side result we establish the NP-completeness of several hazard detection problems.

Supplementary Material

MP4 File (6b-3.mp4)

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Cited By

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  • (2024)A Path to Safer Digital Systems Using Proactive Hazard Analysis in Logic Circuit Design2024 35th Conference of Open Innovations Association (FRUCT)10.23919/FRUCT61870.2024.10516411(11-21)Online publication date: 24-Apr-2024
  • (2019)On the Complexity of Hazard-free CircuitsJournal of the ACM10.1145/332012366:4(1-20)Online publication date: 23-Aug-2019
  • (2019)Optimal Metastability-Containing Sorting via Parallel Prefix ComputationIEEE Transactions on Computers10.1109/TC.2019.2939818(1-1)Online publication date: 2019
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    cover image ACM Conferences
    STOC 2018: Proceedings of the 50th Annual ACM SIGACT Symposium on Theory of Computing
    June 2018
    1332 pages
    ISBN:9781450355599
    DOI:10.1145/3188745
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 20 June 2018

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    Author Tags

    1. Boolean circuits
    2. Hazards
    3. Monotone circuits
    4. computational complexity

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    • ERC

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    STOC '18: Symposium on Theory of Computing
    June 25 - 29, 2018
    CA, Los Angeles, USA

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    View all
    • (2024)A Path to Safer Digital Systems Using Proactive Hazard Analysis in Logic Circuit Design2024 35th Conference of Open Innovations Association (FRUCT)10.23919/FRUCT61870.2024.10516411(11-21)Online publication date: 24-Apr-2024
    • (2019)On the Complexity of Hazard-free CircuitsJournal of the ACM10.1145/332012366:4(1-20)Online publication date: 23-Aug-2019
    • (2019)Optimal Metastability-Containing Sorting via Parallel Prefix ComputationIEEE Transactions on Computers10.1109/TC.2019.2939818(1-1)Online publication date: 2019
    • (2018)Metastability-Containing CircuitsIEEE Transactions on Computers10.1109/TC.2018.2808185(1-1)Online publication date: 2018

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