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Packet Leak Detection on Hardware-Trojan Infected NoCs for MPSoC Systems

Published: 17 March 2017 Publication History

Abstract

Packet leak on network-on-chip (NoC) is one of the key security concerns in the MPSoC design, where the NoC of the system can come from a third-party vendor and can be illegitimately implanted with hardware trojans. Those trojans are usually small so that they can escape the scrutiny of circuit level testing and perform attacks when activated. This paper targets the trojan that leaks packets to malicious applications by altering the packet source and destination addresses. To detect such a packet leak, we present a cost effective authentication design where the packet source and destination addresses are tagged with a dynamic random value and the tag is scrambled with the packet data. Our design has two features: 1) If the adversary attempts to play with tag to escape detection, the data in the packet may likely be changed -- hence invalidating the leaked packet; 2) If the attacker only alters the packet addresses without twiddling tag in the packet, the attack will be100% detected.

References

[1]
Tehranipoor, M. and F. Koushanfar, A Survey of Hardware Trojan Taxonomy and Detection. Design & Test of Computers, IEEE, 2010. 27(1): p. 10--25.
[2]
Agrawal, D., et al., Trojan detection using IC fingerprinting, in IEEE Symposium on Security and Privacy. 2007. p. 296--310.
[3]
Gebotys, C.H. and R.J. Gebotys. A framework for security on NoC technologies. in Proceedings IEEE Computer Society Annual Symposium on VLSI. 2003.
[4]
Kapoor, H.K., et al., A security framework for noc using authenticated encryption and session keys. Circuits, Systems, and Signal Processing, 2013. 32(6): p. 2605--2622.
[5]
Diguet, J.-P., et al. NOC-centric security of reconfigurable SoC. in Proceedings of the First International Symposium on Networks-On-Chip. 2007. IEEE Computer Society.
[6]
Fiorin, L., et al., Secure memory accesses on networks-on-chip. IEEE Transactions on Computers, 2008. 57(9): p. 1216--1229.
[7]
Porquet, J., A. Greiner, and C. Schwarz. NoC-MPU: A secure architecture for flexible co-hosting on shared memory MPSoCs. in Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011. IEEE.
[8]
Baron, S., M.S. Wangham, and C.A. Zeferino. Security mechanisms to improve the availability of a Network-on-Chip. in International Conference on Electronics, Circuits, and Systems (ICECS), 2013. IEEE.
[9]
Sepulveda, J., et al., QoSS hierarchical NoC-based architecture for MPSoC dynamic protection. International Journal of Reconfigurable Computing, 2012. 2012: p. 3.
[10]
Wassel, H.M., et al. SurfNoC: a low latency and provably non-interfering approach to secure networks-on-chip. in Proceedings of the 40th Annual International Symposium on Computer Architecture. 2013. ACM.
[11]
Yu, Q. and J. Frey, Exploiting error control approaches for Hardware Trojans on Network-On-Chip links, in IEEE International Symposium on Defect & Fault Tolerance in VLSI & Nanotechnology Systems (DFTS). 2013. p. 266--271.
[12]
Boraten, T. and A.K. Kodi, Packet security with path sensitization for NoCs, in Design, Automation & Test in Europe. 2016. p. 1136--1139.
[13]
JS, R., et al., Runtime detection of a bandwidth denial attack from a rogue network-on-chip, in Proceedings of the International Symposium on Networks-On-Chip. 2015. p. 8.
[14]
Frey, J. and Q. Yu, Exploiting state obfuscation to detect hardware trojans in NoC network interfaces, in IEEE International Midwest Symposium on Circuits and Systems. 2015. p. 1--4.
[15]
Ancajas, D.M., K. Chakraborty, and S. Roy, Fort-NoCs: Mitigating the Threat of a Compromised NoC, in Proceedings of the The 51st Annual Design Automation Conference. 2014, ACM. p. 1--6.
[16]
Bokhari, H., et al., SuperNet: multimode interconnect architecture for manycore chips, in Proceedings of the 52nd Annual Design Automation Conference. 2015. p. 85.
[17]
Jiang, N., et al., A detailed and flexible cycle-accurate network-on-chip simulator, in IEEE International Symposium on Performance Analysis of Systems and Software. 2013. p. 86--96.
[18]
Hestness, J. and S.W. Keckler, Netrace: Dependency-tracking traces for efficient network-on-chip experimentation. The University of Texas at Austin, Dept. of Computer Science, Tech. Rep, 2011.
[19]
Modelsim Simulator. http://www.mentor.com/products/fv/modelsim.
[20]
Synopsys Design Compiler. http://www.synopsys.com.
[21]
TSMC 65nm GP Standard Cell Libraries - tcbn65gplus. https://www.cmc.ca/en/WhatWeOffer/Products/CMC-00200-01411.aspx.

Cited By

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  • (2024)TROP: TRust-aware OPportunistic Routing in NoC with Hardware TrojansACM Transactions on Design Automation of Electronic Systems10.1145/363982129:2(1-25)Online publication date: 15-Feb-2024
  • (2024)HTree: Hardware Trojan Attack on Cache Resizing PoliciesIEEE Embedded Systems Letters10.1109/LES.2023.334760716:3(263-266)Online publication date: Sep-2024
  • (2023) edAttack : Hardware Trojan Attack on On-Chip Packet Compression IEEE Design & Test10.1109/MDAT.2023.330671840:6(125-135)Online publication date: Dec-2023
  • Show More Cited By

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cover image ACM Other conferences
ICCSP '17: Proceedings of the 2017 International Conference on Cryptography, Security and Privacy
March 2017
153 pages
ISBN:9781450348676
DOI:10.1145/3058060
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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  • Wuhan Univ.: Wuhan University, China

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 17 March 2017

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Author Tags

  1. Hardware Trojan
  2. Network-on-chip
  3. Packet leak detection

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Cited By

View all
  • (2024)TROP: TRust-aware OPportunistic Routing in NoC with Hardware TrojansACM Transactions on Design Automation of Electronic Systems10.1145/363982129:2(1-25)Online publication date: 15-Feb-2024
  • (2024)HTree: Hardware Trojan Attack on Cache Resizing PoliciesIEEE Embedded Systems Letters10.1109/LES.2023.334760716:3(263-266)Online publication date: Sep-2024
  • (2023) edAttack : Hardware Trojan Attack on On-Chip Packet Compression IEEE Design & Test10.1109/MDAT.2023.330671840:6(125-135)Online publication date: Dec-2023
  • (2023)Impact Analysis of Distributed DoS Attack by Multiple HTs in TCMP Architectures2023 International Conference on Control, Communication and Computing (ICCC)10.1109/ICCC57789.2023.10165276(1-6)Online publication date: 19-May-2023
  • (2022)SecureNoC: A Learning-Enabled, High-Performance, Energy-Efficient, and Secure On-Chip Communication Framework DesignIEEE Transactions on Sustainable Computing10.1109/TSUSC.2021.31382797:3(709-723)Online publication date: 1-Jul-2022
  • (2022)LOKI: A Hardware Trojan Affecting Multiple Components of an SoC2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI54635.2022.00043(176-181)Online publication date: Jul-2022
  • (2022)Roadmap for machine learning based network-on-chip (M/L NoC) technology and its analysis for researchersJournal of Physics Communications10.1088/2399-6528/ac4dd56:2(022001)Online publication date: 18-Feb-2022
  • (2021)Packet header attack by hardware trojan in NoC based TCMP and its impact analysisProceedings of the 15th IEEE/ACM International Symposium on Networks-on-Chip10.1145/3479876.3481597(21-28)Online publication date: 14-Oct-2021
  • (2020)SECTAR: Secure NoC using Trojan Aware Routing2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS)10.1109/NOCS50636.2020.9241711(1-8)Online publication date: 24-Sep-2020
  • (2020)Towards NoC Protection of HT-Greyhole AttackAlgorithms and Architectures for Parallel Processing10.1007/978-3-030-60248-2_21(309-323)Online publication date: 29-Sep-2020
  • Show More Cited By

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