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Design technology for fault-free and maximally-parallel wavelength-routed optical networks-on-chip

Published: 07 November 2016 Publication History

Abstract

The recent interest in emerging interconnect technologies is bringing the issue of a proper EDA support for them to the forefront, so to tackle the design complexity. A relevant case study is provided by wavelength-routed optical NoCs (WRONoCs), which add communication performance guarantees to the typical latency, throughput and power benefits of an optical link, thus providing an appealing technology for the photonic integration of high-end embedded systems. Typically, only abstract WRONoC models are considered to figure out architecture-level performance, and logic connectivity patterns for the quantification of the required signal strength (i.e., static power). However, this design practice overlooks the needed refinement step, where key physical parameters are assigned such as wavelengths of the optical channels, and size of the optical filters. This step is unfortunately not decoupled from the architectural evaluation, since its main constraint (i.e., avoiding routing faults) turns out to be a key limiter for both the network scale and the achievable communication parallelism. By proposing a formal methodology to select WRONoC parameters while avoding the routing fault concern, this paper aims at maximizing the levels of connectivity and/or of bit parallelism that WRONoCs can achieve, while relating their upper bounds to the uncertainty of the manufacturing process.

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  • (2020)PSION+: Combining logical topology and physical layout optimization for Wavelength-Routed ONoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.2971536(1-1)Online publication date: 2020
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        cover image Guide Proceedings
        2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
        Nov 2016
        946 pages

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        IEEE Press

        Publication History

        Published: 07 November 2016

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        • (2023)Accurate Infinite-Order Crosstalk Calculation for Optical Networks-on-ChipJournal of Lightwave Technology10.1109/JLT.2022.321015941:1(4-16)Online publication date: 1-Jan-2023
        • (2023)Toward Parallelism-Optimal Topology Generation for Wavelength-Routed Optical NoC Designs2023 60th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC56929.2023.10247996(1-6)Online publication date: 9-Jul-2023
        • (2020)PSION+: Combining logical topology and physical layout optimization for Wavelength-Routed ONoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.2971536(1-1)Online publication date: 2020
        • (2019)PSIONProceedings of the 2019 International Symposium on Physical Design10.1145/3299902.3309747(49-56)Online publication date: 4-Apr-2019
        • (2018)OPERONProceedings of the 55th Annual Design Automation Conference10.1145/3195970.3196084(1-6)Online publication date: 24-Jun-2018
        • (2018)Wavelength-Routed Optical Networks-on-ChipProceedings of the 2018 Great Lakes Symposium on VLSI10.1145/3194554.3194607(311-316)Online publication date: 30-May-2018
        • (2018)OPERON: Optical-electrical Power-efficient Route Synthesis for On-chip Signals2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC)10.1109/DAC.2018.8465879(1-6)Online publication date: Jun-2018
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        • (2017)A Survey on Optical Network-on-Chip ArchitecturesACM Computing Surveys10.1145/313134650:6(1-37)Online publication date: 6-Dec-2017
        • (2017)Contrasting Laser Power Requirements of Wavelength-Routed Optical NoC Topologies Subject to the Floorplanning, Placement, and Routing Constraints of a 3-D-Stacked SystemIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2017.267777925:7(2081-2094)Online publication date: Jul-2017

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