Nothing Special   »   [go: up one dir, main page]

skip to main content
10.1145/2800986.2801000acmconferencesArticle/Chapter ViewAbstractPublication PagessbcciConference Proceedingsconference-collections
research-article

CMOS Transconductor Analysis for Low Temperature Sensitivity Based on ZTC MOSFET Condition

Published: 31 August 2015 Publication History

Abstract

The necessary conditions to design MOSFET transconductors with low temperature dependence are analysed and defined in this paper. Transconductors, or Gm circuits, are fundamental blocks used to implement adjustable filters, multipliers, controlled oscillators, amplifiers and a large variety of analog circuits. Temperature stability is a must in such applications, and herein we show a strategy that can be used to improve the temperature stability of these transconductors by biasing MOSFETs at transconductance zero-temperature condition (GZTC). This special bias condition is analysed using a MOSFET model which is continuous from weak to strong inversion, and it is proved that this condition always occurs from moderate to strong inversion operation in any CMOS fabrication process. Additionally, a few example circuits are proposed using this technique: a single-ended resistor emulator, an impedance inverter, a first order and a second order filter. These circuits were simulated in a 130 nm CMOS commercial process, resulting improved thermal stability in the main performance parameters, in the range from 27 to 53 ppm/°C.

References

[1]
R. Geiger and E. Sanchez-Sinencio, "Active filter design using operational transconductance amplifiers: A tutorial," Circuits and Devices Magazine, IEEE, vol. 1, no. 2, pp. 20--32, March 1985.
[2]
B. Razavi, "The cross-coupled pair - part i {a circuit for all seasons}," Solid-State Circuits Magazine, IEEE, vol. 6, no. 3, pp. 7--10, Summer 2014.
[3]
B. Razavi, "The cross-coupled pair - part ii {a circuit for all seasons}," Solid-State Circuits Magazine, IEEE, vol. 6, no. 4, pp. 9--12, Fall 2014.
[4]
B. Razavi, "The cross-coupled pair?part iii {a circuit for all seasons}," Solid-State Circuits Magazine, IEEE, vol. 7, no. 1, pp. 10--13, winter 2015.
[5]
J. Torres, M. El-Nozahi, A. Amer, S. Gopalraju, R. Abdullah, K. Entesari, and E. Sanchez-Sinencio, "Low drop-out voltage regulators: Capacitor-less architecture comparison," Circuits and Systems Magazine, IEEE, vol. 14, no. 2, pp. 6--26, Secondquarter 2014.
[6]
H. Geddada, C.-T. Fu, J. Silva-Martinez, and S. Taylor, "Wide-band inductorless low-noise transconductance amplifiers with high large-signal linearity," Microwave Theory and Techniques, IEEE Transactions on, vol. 62, no. 7, pp. 1495--1505, July 2014.
[7]
Y. Tsividis, Z. Czarnul, and S. Fang, "Mos transconductors and integrators with high linearity," Electronics Letters, vol. 22, no. 5, pp. 245--246, February 1986.
[8]
S. Koziel and S. Szczepanski, "Design of highly linear tunable cmos ota for continuous-time filters," Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on, vol. 49, no. 2, pp. 110--122, Feb 2002.
[9]
A. Lopez-Martin, S. Baswa, J. Ramirez-Angulo, and R. Carvajal, "Low-voltage super class ab cmos ota cells with very high slew rate and power efficiency," Solid-State Circuits, IEEE Journal of, vol. 40, no. 5, pp. 1068--1077, May 2005.
[10]
C. Schneider and C. Galup-Montoro, CMOS Analog Design Using All-Region MOSFET Modeling, 1st ed. Cambridge University Press, 2010.
[11]
I. Filanovsky and A. Allam, ""mutual compensation of mobility and threshold voltage temperature effects with applications in cmos circuits"," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 48, no. 7, pp. 876--883, Jul. 2005.
[12]
M. Sze, Physics of Semiconductor Device. Wiley, 1981.
[13]
R. J. Baker, CMOS Circuit Design, Layout, and Simulation, Second Edition. Wiley-IEEE Press, 2004.
[14]
F. Serra-Graells and J. Huertas, "Sub-1-v cmos proportional-to-absolute temperature references," Solid-State Circuits, IEEE Journal of, vol. 38, no. 1, pp. 84--88, Jan 2003.
[15]
H. Gopal and M. Baghini, "Trimless, pvt insensitive voltage reference using compensation of beta and thermal voltage," in VLSI Design and 2014 13th International Conference on Embedded Systems, 2014 27th International Conference on, Jan 2014, pp. 528--533.
[16]
P. Toledo, H. Klimach, D. Cordova, S. Bampi, and E. Fabris, "Self-biased cmos current reference based on the ztc operation condition," in Integrated Circuits and Systems Design (SBCCI), 2014 27th Symposium on, Sept 2014, pp. 1--7.
[17]
C. Galup-Montoro, M. Schneider, H. Klimach, and A. Arnaud, "A compact model of mosfet mismatch for circuit design," Solid-State Circuits, IEEE Journal of, vol. 40, no. 8, pp. 1649--1657, Aug 2005.

Cited By

View all
  • (2023)Assessment of the Zero Distortion Bias Point Using Design-Oriented 7-Parameter MOSFET Model2023 7th International Young Engineers Forum (YEF-ECE)10.1109/YEF-ECE58420.2023.10209294(84-88)Online publication date: 7-Jul-2023
  • (2023)Voltage Regulator with Ellipsoidal Transistors2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)10.1109/SBCCI60457.2023.10261974(1-4)Online publication date: 28-Aug-2023
  • (2022)An Ultra-Low Power RSSI Amplifier for EEG Feature Extraction to Detect SeizuresIEEE Transactions on Circuits and Systems II: Express Briefs10.1109/TCSII.2021.309905669:2(329-333)Online publication date: Feb-2022
  • Show More Cited By

Index Terms

  1. CMOS Transconductor Analysis for Low Temperature Sensitivity Based on ZTC MOSFET Condition

    Recommendations

    Comments

    Please enable JavaScript to view thecomments powered by Disqus.

    Information & Contributors

    Information

    Published In

    cover image ACM Conferences
    SBCCI '15: Proceedings of the 28th Symposium on Integrated Circuits and Systems Design
    August 2015
    279 pages
    ISBN:9781450337632
    DOI:10.1145/2800986
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

    Sponsors

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 31 August 2015

    Permissions

    Request permissions for this article.

    Check for updates

    Author Tags

    1. CMOS
    2. GZTC Condition
    3. Low Temperature Sensitivity Transconductors
    4. ZTC Condition
    5. analog integrated circuits

    Qualifiers

    • Research-article
    • Research
    • Refereed limited

    Funding Sources

    Conference

    SBCCI '15
    Sponsor:
    SBCCI '15: 28th Symposium on Integrated Circuits and Systems Design
    August 31 - September 4, 2015
    Salvador, Brazil

    Acceptance Rates

    SBCCI '15 Paper Acceptance Rate 43 of 98 submissions, 44%;
    Overall Acceptance Rate 133 of 347 submissions, 38%

    Contributors

    Other Metrics

    Bibliometrics & Citations

    Bibliometrics

    Article Metrics

    • Downloads (Last 12 months)15
    • Downloads (Last 6 weeks)3
    Reflects downloads up to 01 Dec 2024

    Other Metrics

    Citations

    Cited By

    View all
    • (2023)Assessment of the Zero Distortion Bias Point Using Design-Oriented 7-Parameter MOSFET Model2023 7th International Young Engineers Forum (YEF-ECE)10.1109/YEF-ECE58420.2023.10209294(84-88)Online publication date: 7-Jul-2023
    • (2023)Voltage Regulator with Ellipsoidal Transistors2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)10.1109/SBCCI60457.2023.10261974(1-4)Online publication date: 28-Aug-2023
    • (2022)An Ultra-Low Power RSSI Amplifier for EEG Feature Extraction to Detect SeizuresIEEE Transactions on Circuits and Systems II: Express Briefs10.1109/TCSII.2021.309905669:2(329-333)Online publication date: Feb-2022
    • (2021)Re-thinking Analog Integrated Circuits in Digital Terms: A New Design Concept for the IoT EraIEEE Transactions on Circuits and Systems II: Express Briefs10.1109/TCSII.2021.3049680(1-1)Online publication date: 2021
    • (2021)20 nm GAA-GaN/Al2O3 nanowire MOSFET for improved analog/linearity performance metrics and suppressed distortionApplied Physics A10.1007/s00339-021-04673-9127:7Online publication date: 16-Jun-2021
    • (2019)EMI resisting MOSFET-only voltage reference based on ZTC conditionAnalog Integrated Circuits and Signal Processing10.1007/s10470-016-0766-589:1(45-59)Online publication date: 1-Jan-2019

    View Options

    Login options

    View options

    PDF

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader

    Media

    Figures

    Other

    Tables

    Share

    Share

    Share this Publication link

    Share on social media