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Author retrospective for compiler-directed data prefetching in multiprocessors with memory hierarchies

Published: 10 June 2014 Publication History

Abstract

The ideas of compiler-generated prefetching were first proposed in the late 80's. Two main research directions were pursued, both addressed prefetching for loop-based applications containing arrays with regular access patterns. Our approach assumed a hardware prefetcher controlled by software and prefetching into a separate prefetch buffer and finding the earliest point such a prefetch can possibly be initiated. The other approach proposed to prefetch into a cache using a prefetch instruction. This retrospective examines the decisions made at the time and their applicability in today's high-performance processors.

References

[1]
Alexander V. Veidenbaum. A Compiler-Assisted Cache Coherence Solution for Multiprocessors. Intl. Conference on Parallel Processing (ICPP), 1986. pp. 1029--1036.
[2]
Randy Allen, Ken Kennedy. Automatic Translation of Fortran Programs to Vector Form. ACM Trans. Program. Lang. Syst. 9(4), pp. 491--542 (1987).
[3]
Norman P. Jouppi. "Improving direct-mapped cache performance by the addition of a small fully-associative cache and prefetch buffers," Intl. Symposium on Computer Architecture (ISCA), 1990. pp. 364--373.
[4]
Todd C. Mowry, Anoop Gupta. Tolerating Latency Through Software-Controlled Prefetching in Shared-Memory Multiprocessors. J. Parallel Distrib. Comput. 12(2), pp. 87--106 (1991).
[5]
David. J Kuck, et al. The Cedar System and an Initial Performance Study. Intl. Symposium on Computer Architecture (ISCA), 1993. pp. 213--223.
[6]
Daniel Lenoski, et al. The DASH Prototype: Implementation and Performance. Intl. Symposium on Computer Architecture (ISCA), 1992. pp. 92--103.

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  1. Author retrospective for compiler-directed data prefetching in multiprocessors with memory hierarchies

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    cover image ACM Conferences
    ACM International Conference on Supercomputing 25th Anniversary Volume
    June 2014
    94 pages
    ISBN:9781450328401
    DOI:10.1145/2591635
    Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the Owner/Author.

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    New York, NY, United States

    Publication History

    Published: 10 June 2014

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    Author Tags

    1. caches
    2. compiler
    3. interconnection network
    4. multi-processor
    5. prefetching

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