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Malacoda: towards high-level compilation of network security applications on reconfigurable hardware

Published: 29 October 2012 Publication History

Abstract

While the use of reconfigurable computing for tasks such as packet header processing or deep packet-inspection in high-speed networks has been widely studied, efforts to extend the technology to application-level processing have only recently been made. One issue that has prevented wider use of reconfigurable platforms in that context is the unfamiliar programming environment: Such systems commonly require expertise in computer architecture and digital logic design generally foreign to networking experts. To make the technology more accessible to potential users, we present the high-level domain-specific language Malacoda for application-level network processing and an associated compiler that automatically translates Malacoda descriptions into high-performance hardware blocks for insertion into an FPGA-based processing platform. We evaluate our approach on the use-case of a hardware-accelerated secure honeypot-in-a-box, programmed in Malacoda, and implemented on the NetFPGA 10G board. Results from a live-test of the system connected to a 10G Internet uplink complete the evaluation.

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Cited By

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  • (2020)Review on Hardware Solutions for Cybersecurity of Communication Systems2020 28th National Conference with International Participation (TELECOM)10.1109/TELECOM50385.2020.9299537(129-132)Online publication date: 29-Oct-2020
  • (2020)A Survey on FPGA Support for the Feasible Execution of Virtualized Network FunctionsIEEE Communications Surveys & Tutorials10.1109/COMST.2019.294369022:1(504-525)Online publication date: Sep-2021
  • (2018)Challenges and Methodologies of Hardware Security2018 IEEE 32nd International Conference on Advanced Information Networking and Applications (AINA)10.1109/AINA.2018.00136(928-933)Online publication date: May-2018
  • Show More Cited By

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    cover image ACM Conferences
    ANCS '12: Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
    October 2012
    270 pages
    ISBN:9781450316859
    DOI:10.1145/2396556
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Publication History

    Published: 29 October 2012

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    Author Tags

    1. 10G
    2. FPGA
    3. high-level languages
    4. honeypot
    5. networking

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    Cited By

    View all
    • (2020)Review on Hardware Solutions for Cybersecurity of Communication Systems2020 28th National Conference with International Participation (TELECOM)10.1109/TELECOM50385.2020.9299537(129-132)Online publication date: 29-Oct-2020
    • (2020)A Survey on FPGA Support for the Feasible Execution of Virtualized Network FunctionsIEEE Communications Surveys & Tutorials10.1109/COMST.2019.294369022:1(504-525)Online publication date: Sep-2021
    • (2018)Challenges and Methodologies of Hardware Security2018 IEEE 32nd International Conference on Advanced Information Networking and Applications (AINA)10.1109/AINA.2018.00136(928-933)Online publication date: May-2018
    • (2017)A Survey and Taxonomy on Data and Pre-processing Techniques of Intrusion Detection SystemsComputer and Network Security Essentials10.1007/978-3-319-58424-9_7(113-134)Online publication date: 13-Aug-2017
    • (2014)A Reconfigurable Platform and Programming Tools for High-Level Network Applications Demonstrated as a Hardware HoneypotIEEE Journal on Selected Areas in Communications10.1109/JSAC.2014.235883832:10(1919-1932)Online publication date: Oct-2014

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