research-article

Speculative separation for privatization and reductions

Authors:

Nick P. Johnson,

Prakash Prabhu,

David I. AugustAuthors Info & Claims

ACM SIGPLAN Notices, Volume 47, Issue 6

Pages 359 - 370

https://doi.org/10.1145/2345156.2254107

Published: 11 June 2012 Publication History

Abstract

Automatic parallelization is a promising strategy to improve application performance in the multicore era. However, common programming practices such as the reuse of data structures introduce artificial constraints that obstruct automatic parallelization. Privatization relieves these constraints by replicating data structures, thus enabling scalable parallelization. Prior privatization schemes are limited to arrays and scalar variables because they are sensitive to the layout of dynamic data structures. This work presents Privateer, the first fully automatic privatization system to handle dynamic and recursive data structures, even in languages with unrestricted pointers. To reduce sensitivity to memory layout, Privateer speculatively separates memory objects. Privateer's lightweight runtime system validates speculative separation and speculative privatization to ensure correct parallel execution. Privateer enables automatic parallelization of general-purpose C/C++ applications, yielding a geomean whole-program speedup of 11.4x over best sequential execution on 24 cores, while non-speculative parallelization yields only 0.93x.

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Cited By

Salamanca JBaldassin A(2024)Using Hardware-Transactional-Memory Support to Implement Speculative Task ExecutionJournal of Parallel and Distributed Computing10.1016/j.jpdc.2024.104939(104939)Online publication date: Jun-2024
https://doi.org/10.1016/j.jpdc.2024.104939
Salamanca JBaldassin A(2022)Using Hardware Transactional Memory to Implement Speculative Privatization in OpenMPLanguages and Compilers for Parallel Computing10.1007/978-3-030-95953-1_5(57-73)Online publication date: 16-Feb-2022
https://doi.org/10.1007/978-3-030-95953-1_5
Lu XChen LLi Z(2017)Performance Evaluation and Enhancement of Process-Based Parallel Loop ExecutionInternational Journal of Parallel Programming10.1007/s10766-015-0394-145:1(185-198)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1007/s10766-015-0394-1
Show More Cited By

Index Terms

Speculative separation for privatization and reductions
1. Software and its engineering
  1. Software notations and tools
    1. Compilers

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Information & Contributors

Information

Published In

cover image ACM SIGPLAN Notices

ACM SIGPLAN Notices Volume 47, Issue 6

PLDI '12

June 2012

534 pages

ISSN:0362-1340

EISSN:1558-1160

DOI:10.1145/2345156

Issue’s Table of Contents

PLDI '12: Proceedings of the 33rd ACM SIGPLAN Conference on Programming Language Design and Implementation
June 2012
572 pages
ISBN:9781450312059
DOI:10.1145/2254064
General Chairs:
Jan Vitek
Purdue University
,
Haibo Lin
Microsoft China
,
Program Chair:
Frank Tip
IBM T.J. Watson Research Center

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 11 June 2012

Published in SIGPLAN Volume 47, Issue 6

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Cited By

Salamanca JBaldassin A(2024)Using Hardware-Transactional-Memory Support to Implement Speculative Task ExecutionJournal of Parallel and Distributed Computing10.1016/j.jpdc.2024.104939(104939)Online publication date: Jun-2024
https://doi.org/10.1016/j.jpdc.2024.104939
Salamanca JBaldassin A(2022)Using Hardware Transactional Memory to Implement Speculative Privatization in OpenMPLanguages and Compilers for Parallel Computing10.1007/978-3-030-95953-1_5(57-73)Online publication date: 16-Feb-2022
https://doi.org/10.1007/978-3-030-95953-1_5
Lu XChen LLi Z(2017)Performance Evaluation and Enhancement of Process-Based Parallel Loop ExecutionInternational Journal of Parallel Programming10.1007/s10766-015-0394-145:1(185-198)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1007/s10766-015-0394-1
Gonzalez-Mesa MQuislant RGutierrez EPlata O(2013)Exploring Irregular Reduction Support in Transactional MemoryAlgorithms and Architectures for Parallel Processing10.1007/978-3-319-03859-9_22(257-266)Online publication date: 18-Dec-2013
https://dl.acm.org/doi/10.1007/978-3-319-03859-9_22
Xu ZChon YSu YTan ZApostolakis SCampanoni SAugust D(2024)PROMPT: A Fast and Extensible Memory Profiling FrameworkProceedings of the ACM on Programming Languages10.1145/36498278:OOPSLA1(449-473)Online publication date: 29-Apr-2024
https://dl.acm.org/doi/10.1145/3649827
Bhosale AEigenmann RLee IChabbi MSteuwer M(2024)Recurrence Analysis for Automatic Parallelization of Subscripted SubscriptsProceedings of the 29th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming10.1145/3627535.3638493(80-93)Online publication date: 2-Mar-2024
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Zhang YLiu TSun ZChen ZLi XZuo ZJust RFraser G(2023)Catamaran: Low-Overhead Memory Safety Enforcement via Parallel AccelerationProceedings of the 32nd ACM SIGSOFT International Symposium on Software Testing and Analysis10.1145/3597926.3598098(816-828)Online publication date: 12-Jul-2023
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Apostolakis SXu ZTan ZChan GCampanoni SAugust DDonaldson ATorlak E(2020)SCAF: a speculation-aware collaborative dependence analysis frameworkProceedings of the 41st ACM SIGPLAN Conference on Programming Language Design and Implementation10.1145/3385412.3386028(638-654)Online publication date: 11-Jun-2020
https://dl.acm.org/doi/10.1145/3385412.3386028
Ying VJeffrey MSanchez DMartínez JDuato JEeckhout L(2020)T4Proceedings of the ACM/IEEE 47th Annual International Symposium on Computer Architecture10.1109/ISCA45697.2020.00024(159-172)Online publication date: 30-May-2020
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Yan XJoa AWong BCassell BSzepesi TNaouach MLam DPierre GFerreira PShrira L(2018)SpecRPCProceedings of the 19th International Middleware Conference10.1145/3274808.3274829(266-278)Online publication date: 26-Nov-2018
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