research-article

Can EDA combat the rise of electronic counterfeiting?

Authors:

Farinaz Koushanfar,

Saverio Fazzari,

William Bryson,

Miodrag PotkonjakAuthors Info & Claims

DAC '12: Proceedings of the 49th Annual Design Automation Conference

Pages 133 - 138

https://doi.org/10.1145/2228360.2228386

Published: 03 June 2012 Publication History

Abstract

The Semiconductor Industry Associates (SIA) estimates that counterfeiting costs the US semiconductor companies $7.5B in lost revenue, and this is indeed a growing global problem. Repackaging the old ICs, selling the failed test parts, as well as gray marketing, are the most dominant counterfeiting practices. Can technology do a better job than lawyers? What are the technical challenges to be addressed? What EDA technologies will work: embedding IP protection measures in the design phase, developing rapid post- silicon certification, or counterfeit detection tools and methods?

References

[1]

Y. Alkabani and F. Koushanfar. "Active Hardware Metering for Intellectual Property Protection and Security" USENIX Security, pp. 291--306, 2007.

Digital Library

[2]

A. Caldwell et al., "Effective iterative techniques for fingerprinting design IP," IEEE T-CAD, vol. 23, no. 2, pp. 208--215, 2004.

Digital Library

[3]

A. Kahng et al., "Copy detection for intellectual property protection of VLSI designs," ICCAD, pp. 600--604, 1999.

Digital Library

[4]

F. Koushanfar, G. Qu, and M. Potkonjak, "Intellectual property metering," IH, pp. 81--95, 2001.

Digital Library

[5]

F. Koushanfar and M. Potkonjak, "CAD-based security, cryptography, and digital rights management," DAC, pp. 268--269, 2007.

Digital Library

[6]

Y. Alkabani et al. "Trusted integrated circuits: a nondestructive hidden characteristics extraction approach," IH, pp. 102--117, 2008.

Digital Library

[7]

S. Wei, S. Meguerdichian, and M. Potkonjak, "Gate-level characterization: foundations and hardware security applications," DAC, pp. 222--227, 2010.

Digital Library

[8]

S. Wei, A. Nahapetian, and M. Potkonjak, "Robust passive hardware metering," ICCAD, pp. 802--809, 2011.

Digital Library

[9]

R. Chau et al., "High-k/metal-gate stack and its MOSFET characteristics," IEEE EDL, vol. 25, no. 6, pp. 408--410, 2004.

[10]

D. Markovic et al., "Ultralow-power design in near-threshold region," Proc. of the IEEE, vol. 98, no. 2, pp. 237--252, 2010.

[11]

J. Black, "Electromigration - a brief survey and some recent results," IEEE T-ED, vol. 16, no. 4, pp. 338--347, 1969.

[12]

A. Sekiguchi, J. Koike, and K. Maruyama, "Microstructural influences on stress migration in electroplated Cu metallization," Appl. Phys. Lett., vol. 83, no. 10, pp. 1962--1964, 2003.

[13]

J. Stathis, "Physical and predictive models of ultrathin oxide reliability in CMOS devices and circuits," IEEE T-DMR, vol. 1, no. 1, pp. 43--59, 2001.

[14]

J. Pang, D. Chong, and T. Low, "Thermal cycling analysis of flip-chip solder joint reliability," IEEE T-CPMT, vol. 24, no. 4, pp. 705--712, 2001.

[15]

K. Mistry et al., "A 45nm logic technology with high-k+metal gate transistors, strained silicon, 9 Cu interconnect layers, 193nm dry patterning, and 100% Pb-free packaging," IEDM, pp. 247--250, 2007.

[16]

R. Havemann and J. Hutchby, "High-performance interconnects: an integration overview," Proc. of the IEEE, vol. 89, no. 5, pp. 586--601, 2001.

[17]

S. Bhardwaj et al., "Predictive modeling of the NBTI effect for reliable design," CICC pp. 189--192, 2006.

[18]

E. Takeda and N. Suzuki, "An empirical model for device degradation due to hot-carrier injection," IEEE EDL, vol. 4, no. 4, pp. 111--113, 1983.

[19]

P. Heremans et al., "Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFETs," IEEE T-ED, vol. 35, no. 12, pp. 2194--2209, 1988.

[20]

J. Srinivasan et al., "The case for microarchitectural awareness of lifetime reliability," ISCA, 2004.

[21]

E. Y. Wu et al., "Interplay of voltage and temperature acceleration of oxide breakdown for ultra-thin gate dioxides," Solid-State Electronics Journal, 2002.

[22]

B. Gassend et al., "Silicon physical random functions," ACM CCS, pp. 148--160, 2002.

Digital Library

[23]

M. Majzoobi, F. Koushanfar, and M. Potkonjak, "Techniques for design and implementation of secure reconfigurable PUFs," ACM T-RETS, vol. 2, no. 1, pp. 1--33, 2009.

Digital Library

[24]

K. Gross, R. C. Dhankula, and A. J. Lewis, "Detecting counterfeit electronic components using EMI telemetric fingerprints." US Patent Application US 2009/009830 A1, 2009.

[25]

M. Agarwal et al., "Circuit failure prediction and its application to transistor aging," IEEE VTS, pp. 277--286, 2007.

Digital Library

[26]

N. Beckmann and M. Potkonjak, "Hardware-based public-key cryptography with public physically unclonable functions," IH, pp. 206--220, 2009.

Digital Library

[27]

M. Potkonjak, S. Meguerdichian, and A. Nahapetian, "Differential public physically unclonable functions: architecture and applications," DAC, pp. 242--247, 2011.

Digital Library

[28]

M. Tehranipoor and F. Koushanfar, "A survey of hardware Trojan taxonomy and detection," IEEE D & T of Computers, vol. 27, no. 1, pp. 10--25, 2010.

Digital Library

[29]

G. Qu and M. Potkonjak, "Intellectual Property Protection in VLSI Design," Kluwer Academic Publisher, 2003.

[30]

Technical report by U.S. Department Of Commerce, Bureau Of Industry And Security, Office Of Technology Evaluation, "Defense industrial base assessment: Counterfeit electronics," 2010.

[31]

U. Ruhrmair, S. Devadas, and F. Koushanfar, "Security based on Physical Unclonability and Disorder," Book Chapter in 'Introduction to Hardware Security and Trust', Editors: M. Tehranipoor and C. Wang, Springer, 2011.

[32]

F. Armknecht, R. Maes, A.-R. Sadeghi, F.-X. Standaert, and C. Wachsmann, "A formalization of the security features of physical functions," IEEE S & P, pp. 397--412, 2011.

Digital Library

[33]

T. Kim, R. Persaud, and C. H. Kim, "Silicon odometer: An on-chip reliability monitor for measuring frequency degradation of digital circuits," IEEE JSSC, vol. 43, no. 4, pp. 874--880, 2008.

[34]

E. Karl et al., "Compact in-situ sensors for monitoring negative bias-temperature-instability effect and oxide degradation," ISSCC, pp. 410--411, 2008.

[35]

K. K. Kim, W. Wang, and K. Choi, "On-chip aging sensor circuits for reliable nanometer MOSFET digital circuits," T-CAS-II, vol. 57, no. 10, pp. 798--802, 2010.

Digital Library

[36]

F. Koushanfar, A-R. Sadeghi, and H. Seudie "EDA for Secure and Dependable Cybercars: Challenges and Opportunities," DAC, 2012.

Digital Library

[37]

M. Majzoobi and F. Koushanfar, "Time-Bounded Authentication of FPGAs," IEEEE T-IFS, vol. 6, no. 3, pp. 1123--1135, 2011.

Digital Library

[38]

Analytical Solutions Inc., http://www.asinm.com/.

[39]

DARPA Microsystem Technology Office, http://www.darpa.mil/Our_Work/MTO/.

Cited By

Gubbi KLatibari BChowdhury MJalilzadeh AHamedani ERafatirad SSasan AHomayoun HSalehi S(2024)Optimized and Automated Secure IC Design Flow: A Defense-in-Depth ApproachIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2024.336416071:5(2031-2044)Online publication date: May-2024
https://doi.org/10.1109/TCSI.2024.3364160
Zhang YHe ALi JRezine APeng ZLarsson EYang TJiang JLi H(2024)On Modeling and Detecting Trojans in Instruction SetsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.338955843:10(3226-3239)Online publication date: Oct-2024
https://doi.org/10.1109/TCAD.2024.3389558
Sengupta AAnshul A(2024)Watermarking Hardware IPs using Design Parameter Driven Encrypted Dispersion Matrix with Eigen Decomposition Based Security FrameworkIEEE Access10.1109/ACCESS.2024.3382202(1-1)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3382202
Show More Cited By

Index Terms

Can EDA combat the rise of electronic counterfeiting?
1. Hardware
  1. Integrated circuits

Recommendations

Implications of fin width scaling on variability and reliability of high-k metal gate FinFETs

In this paper, we report a study to understand the fin width dependence on performance, variability and reliability of n-type and p-type triple-gate fin field effect transistors (FinFETs) with high-k dielectric and metal gate. Our results indicate that ...
Identification of recovered ICs using fingerprints from a light-weight on-chip sensor
DAC '12: Proceedings of the 49th Annual Design Automation Conference

The counterfeiting and recycling of integrated circuits (ICs) have become major problems in recent years, potentially impacting the security of electronic systems bound for military, financial, or other critical applications. With identical ...
Channel hot-carrier degradation in pMOS and nMOS short channel transistors with high-k dielectric stack

A comparison between pMOS and nMOS short channel transistors with high-k dielectric subjected to channel hot-carrier (CHC) stress is presented. Smaller CHC degradation is observed in pMOS devices. At high temperature, the CHC degradation increases for ...

Comments

Please enable JavaScript to view thecomments powered by Disqus.

Information & Contributors

Information

Published In

cover image ACM Conferences

DAC '12: Proceedings of the 49th Annual Design Automation Conference

June 2012

1357 pages

ISBN:9781450311991

DOI:10.1145/2228360

General Chair:
Patrick Groeneveld
Magma Design Automation, Inc., San Jose, CA
,
Program Chairs:
Donatella Sciuto
Politecnico di Milano, Milano, Italy
,
Soha Hassoun
Tufts Univ., Medford, MA

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Sponsors

EDAC: Electronic Design Automation Consortium
SIGDA: ACM Special Interest Group on Design Automation
IEEE-CEDA

In-Cooperation

SIGBED: ACM Special Interest Group on Embedded Systems

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 03 June 2012

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Author Tags

Qualifiers

Research-article

Conference

DAC '12

Sponsor:

EDAC
SIGDA

DAC '12: The 49th Annual Design Automation Conference 2012

June 3 - 7, 2012

California, San Francisco

Acceptance Rates

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

Upcoming Conference

DAC '25

Sponsor:
sigda

62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

55
Total Citations
View Citations
1,754
Total Downloads

Downloads (Last 12 months)11
Downloads (Last 6 weeks)4

Reflects downloads up to 24 Nov 2024

Other Metrics

View Author Metrics

Citations

Cited By

Gubbi KLatibari BChowdhury MJalilzadeh AHamedani ERafatirad SSasan AHomayoun HSalehi S(2024)Optimized and Automated Secure IC Design Flow: A Defense-in-Depth ApproachIEEE Transactions on Circuits and Systems I: Regular Papers10.1109/TCSI.2024.336416071:5(2031-2044)Online publication date: May-2024
https://doi.org/10.1109/TCSI.2024.3364160
Zhang YHe ALi JRezine APeng ZLarsson EYang TJiang JLi H(2024)On Modeling and Detecting Trojans in Instruction SetsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2024.338955843:10(3226-3239)Online publication date: Oct-2024
https://doi.org/10.1109/TCAD.2024.3389558
Sengupta AAnshul A(2024)Watermarking Hardware IPs using Design Parameter Driven Encrypted Dispersion Matrix with Eigen Decomposition Based Security FrameworkIEEE Access10.1109/ACCESS.2024.3382202(1-1)Online publication date: 2024
https://doi.org/10.1109/ACCESS.2024.3382202
Sengupta AAnshul A(2024)Hardware Security of Image Processing Cores Against IP Piracy Using PSO-Based HLS-Driven Multi-Stage Encryption Fused with Fingerprint SignatureSN Computer Science10.1007/s42979-024-03255-95:7Online publication date: 9-Oct-2024
https://doi.org/10.1007/s42979-024-03255-9
Chaurasia RSengupta A(2024)Exploiting Retina Biometric Fused with Encoded Hash for Designing Watermarked Convolutional Hardware IP Against PiracySN Computer Science10.1007/s42979-024-03247-95:8Online publication date: 23-Oct-2024
https://doi.org/10.1007/s42979-024-03247-9
Chaurasia RSengupta A(2023)Retinal Biometric for Securing JPEG-Codec Hardware IP Core for CE SystemsIEEE Transactions on Consumer Electronics10.1109/TCE.2023.326466969:3(441-457)Online publication date: 1-Aug-2023
https://dl.acm.org/doi/10.1109/TCE.2023.3264669
Akter SKhalil KBayoumi M(2023)Hardware Security in the Internet of Things: A Survey2023 IEEE 36th International System-on-Chip Conference (SOCC)10.1109/SOCC58585.2023.10256974(1-6)Online publication date: 5-Sep-2023
https://doi.org/10.1109/SOCC58585.2023.10256974
Akter SKhalil KBayoumi M(2023)A Survey on Hardware Security: Current Trends and ChallengesIEEE Access10.1109/ACCESS.2023.328869611(77543-77565)Online publication date: 2023
https://doi.org/10.1109/ACCESS.2023.3288696
Anshul ASengupta A(2022)IP Core Protection of Image Processing Filters with Multi-Level Encryption and Covert Steganographic Security Constraints2022 IEEE International Symposium on Smart Electronic Systems (iSES)10.1109/iSES54909.2022.00028(83-88)Online publication date: Dec-2022
https://doi.org/10.1109/iSES54909.2022.00028
Barekatain MLiu HKim E(2022)Wireless and Battery-Less Tamper Detection With Pyroelectric Energy Converter and High-Overtone Bulk Acoustic ResonatorIEEE Sensors Journal10.1109/JSEN.2022.318294022:14(14639-14646)Online publication date: 15-Jul-2022
https://doi.org/10.1109/JSEN.2022.3182940
Show More Cited By

View Options

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Full Access

Get this Publication

View options

PDF

View or Download as a PDF file.

eReader

View online with eReader.

Media

Figures

Other

Tables

View Table of Contents