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GRMIN: a heuristic simplification algorithm for generalized Reed-Muller expressions

Published: 01 August 1995 Publication History

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Cited By

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  • (2011)Determining Minimized Galois Field Expressions for Ternary FunctionsProceedings of the 2011 41st IEEE International Symposium on Multiple-Valued Logic10.1109/ISMVL.2011.26(117-124)Online publication date: 23-May-2011
  • (2009)A detection method for logic functions suitable for dual-logic synthesisProgress in Natural Science10.1016/j.pnsc.2008.11.01419:10(1311-1315)Online publication date: Oct-2009
  • (2004)Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faultsProceedings of the 2004 Asia and South Pacific Design Automation Conference10.5555/1015090.1015143(224-229)Online publication date: 27-Jan-2004
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cover image ACM Conferences
ASP-DAC '95: Proceedings of the 1995 Asia and South Pacific Design Automation Conference
August 1995
ISBN:0897917669
DOI:10.1145/224818
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 1995

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ASPDAC95
Sponsor:
  • IFIP WG 10.2
  • IFIP WG 10.5
  • ISPJ
  • IEICE
  • SIGDA
  • IEEE-CAS
ASPDAC95: Asia Pacific Design Automation Conference
August 29 - September 1, 1995
Makuhari, Massa, Chiba, Japan

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Overall Acceptance Rate 466 of 1,454 submissions, 32%

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Cited By

View all
  • (2011)Determining Minimized Galois Field Expressions for Ternary FunctionsProceedings of the 2011 41st IEEE International Symposium on Multiple-Valued Logic10.1109/ISMVL.2011.26(117-124)Online publication date: 23-May-2011
  • (2009)A detection method for logic functions suitable for dual-logic synthesisProgress in Natural Science10.1016/j.pnsc.2008.11.01419:10(1311-1315)Online publication date: Oct-2009
  • (2004)Testable design of GRM network with EXOR-tree for detecting stuck-at and bridging faultsProceedings of the 2004 Asia and South Pacific Design Automation Conference10.5555/1015090.1015143(224-229)Online publication date: 27-Jan-2004
  • (2001)Baldwinian learning utilizing genetic and heuristic algorithms for logic synthesis and minimization of incompletely specified data with Generalized Reed-Muller (AND-EXOR) formsJournal of Systems Architecture: the EUROMICRO Journal10.1016/S1383-7621(00)00060-647:6(477-489)Online publication date: 1-Jun-2001
  • (1997)Easily Testable Realizations for Generalized Reed-Muller ExpressionsIEEE Transactions on Computers10.1109/12.60083046:6(709-716)Online publication date: 1-Jun-1997

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