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Ultra-constrained sensor platform interfacing

Published: 16 April 2012 Publication History

Abstract

In this work we expose the challenges of interfacing both conventional and new systems with an extremely resource constrained platform. We find that even when attempts are made to utilize an industry standard protocol (I2C), necessary protocol modifications for ultra-low power design means that interfacing remains non-trivial.
We present a functional 0.4mm x 0.8mm ARM Cortex M0 with 3KB of RAM, 24 GPIOs, and an ultra-low power I2C interface. This chip is part of the Michigan Micro Mote (M3) project, which is designed to build a complete software and hardware platform for general purpose sensing at the millimeter scale. We demo an I2C interface circuit allowing commercial hardware to program and interact with the chip and present the beginning of the millimeter scale sensing revolution.

References

[1]
P. Dutta and D. Culler. Epic: An open mote platform for application-driven design. In IPSN'08 Proceedings of the Seventh International Conference on Information Processing in Sensor Networks (IPSN'08), Apr. 2008.
[2]
Y. Lee, G. Kim, S. Bang, Y. Kim, I. Lee, P. Dutta, D. Sylvester, and D. Blaauw. A modular 1mm3 die-stacked sensing platform with optical communication and multi-modal energy harvesting. In ISSCC'12 International Solid-State Circuits Conference, Feb. 2012.

Cited By

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  • (2015)MBusACM SIGARCH Computer Architecture News10.1145/2872887.275037643:3S(629-641)Online publication date: 13-Jun-2015
  • (2015)MBusProceedings of the 42nd Annual International Symposium on Computer Architecture10.1145/2749469.2750376(629-641)Online publication date: 13-Jun-2015

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  1. Ultra-constrained sensor platform interfacing

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    Published In

    cover image ACM Conferences
    IPSN '12: Proceedings of the 11th international conference on Information Processing in Sensor Networks
    April 2012
    354 pages
    ISBN:9781450312271
    DOI:10.1145/2185677

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    Published: 16 April 2012

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    Author Tags

    1. bus protocols
    2. low power
    3. smart dust

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    IPSN '12
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    Overall Acceptance Rate 143 of 593 submissions, 24%

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    • (2015)MBusACM SIGARCH Computer Architecture News10.1145/2872887.275037643:3S(629-641)Online publication date: 13-Jun-2015
    • (2015)MBusProceedings of the 42nd Annual International Symposium on Computer Architecture10.1145/2749469.2750376(629-641)Online publication date: 13-Jun-2015

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