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Enabling parametric feasibility analysis in real-time calculus driven performance evaluation

Published: 09 October 2011 Publication History

Abstract

This paper advocates a rigorously formal and compositional style for obtaining key performance and/or interface metrics of systems with real-time constraints. We propose a hierarchical approach that couples the independent and different by nature frameworks of Modular Performance Analysis with Real-time Calculus (MPA-RTC) and Parametric Feasibility Analysis (PFA). Recent work on Real-time Calculus (RTC) has established an embedding of state-based component models into RTC-driven performance analysis for dealing with more expressive component models. However, with the obtained analysis infrastructure it is possible to analyze components only for a fixed set of parameters, e.g., fixed CPU speeds, fixed buffer sizes etc., such that a big space of parameters remains unstudied. In this paper, we overcome this limitation by integrating the method of parametric feasibility analysis in an RTC-based modeling environment. Using the PFA tool-flow, we are able to find regions for component parameters that maintain feasibility and worst-case properties. As a result, the proposed analysis infrastructure produces a broader range of valid design candidates, and allows the designer to reason about the system robustness.

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cover image ACM Conferences
CASES '11: Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
October 2011
250 pages
ISBN:9781450307130
DOI:10.1145/2038698
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 09 October 2011

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Author Tags

  1. feasibility areas
  2. system-level design
  3. tool integration
  4. worst-case analysis

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ESWeek '11
ESWeek '11: Seventh Embedded Systems Week
October 9 - 14, 2011
Taipei, Taiwan

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  • (2018)A formal approach to the WCRT analysis of multicore systems with memory contention under phase-structured task setsReal-Time Systems10.1007/s11241-014-9211-y50:5-6(736-773)Online publication date: 28-Dec-2018
  • (2016)Causality problem in real-time calculusFormal Methods in System Design10.1007/s10703-016-0250-y48:1-2(1-45)Online publication date: 1-Apr-2016
  • (2014)Safe Implementation of Embedded Software for a Portable Device Supporting Drug AdministrationProceedings of the 2014 IEEE International Conference on Bioinformatics and Bioengineering10.1109/BIBE.2014.55(257-264)Online publication date: 10-Nov-2014
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  • (2013)Multi-mode monitoring for mixed-criticality real-time systems2013 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS)10.1109/CODES-ISSS.2013.6659021(1-10)Online publication date: Sep-2013
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