research-article

Dynamic binary translation to a reconfigurable target for on-the-fly acceleration

Authors:

Phillip Kinsman,

Nicola NicoliciAuthors Info & Claims

DAC '11: Proceedings of the 48th Design Automation Conference

Pages 286 - 287

https://doi.org/10.1145/2024724.2024792

Published: 05 June 2011 Publication History

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Abstract

Dynamic binary translation has been extensively used in porting applications from one platform to another at runtime. At the same time, reconfigurable computing has been commonly employed for hardware acceleration for compute-intensive applications. In this paper we attempt to understand the technical challenges of applying dynamic binary translation to a reconfigurable computing environment, when the translation focus is on-the-fly acceleration.

References

[1]

Wei Chen, Hongyi Lu, Li Shen, Zhiying Wang, and Nong Xiao. Using Pcache to speedup interpretation in dynamic binary translation. In Parallel and Distributed Processing with Applications, 2009 IEEE International Symposium on, pages 525--530, 2009.

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[2]

Simon Haykin. Neural Networks and Learning Machines. Prentice Hall, 3rd edition, November 2008.

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Cited By

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Gomes TSalgado FCabral JTavares AMonteiro J(2019)Non-Intrusive Hardware Acceleration for Dynamic Binary Translation in Embedded Systems2019 IEEE International Conference on Industrial Technology (ICIT)10.1109/ICIT.2019.8755054(1800-1805)Online publication date: Feb-2019
https://doi.org/10.1109/ICIT.2019.8755054
Salgado FGomes TTavares ACabral J(2018)A Hardware-assisted Translation Cache for Dynamic Binary Translation in Embedded Systems2018 IEEE 23rd International Conference on Emerging Technologies and Factory Automation (ETFA)10.1109/ETFA.2018.8502558(307-312)Online publication date: Sep-2018
https://doi.org/10.1109/ETFA.2018.8502558
Salgado FGarcia PGomes TVale JPinto SCabral JEkpanyapong M(2012)Shifting SOA to MPSoC: An exploratory example of applicationProceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation (ETFA 2012)10.1109/ETFA.2012.6489726(1-4)Online publication date: Sep-2012
https://doi.org/10.1109/ETFA.2012.6489726

Index Terms

Dynamic binary translation to a reconfigurable target for on-the-fly acceleration
1. Hardware
  1. Hardware validation

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Information & Contributors

Information

Published In

DAC '11: Proceedings of the 48th Design Automation Conference

June 2011

1055 pages

ISBN:9781450306362

DOI:10.1145/2024724

General Chair:
Leon Stok
IBM Corp., Hopewell Jct., NY
,
Program Chairs:
Nikil Dutt
Univ. of California, Irvine, CA
,
Soha Hassoun
Tufts Univ., Medford, MA

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 June 2011

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DAC '11

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EDAC
SIGDA

DAC '11: The 48th Annual Design Automation Conference 2011

June 5 - 10, 2011

California, San Diego

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Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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DAC '25

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62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

San Francisco , CA , USA

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Cited By

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Gomes TSalgado FCabral JTavares AMonteiro J(2019)Non-Intrusive Hardware Acceleration for Dynamic Binary Translation in Embedded Systems2019 IEEE International Conference on Industrial Technology (ICIT)10.1109/ICIT.2019.8755054(1800-1805)Online publication date: Feb-2019
https://doi.org/10.1109/ICIT.2019.8755054
Salgado FGomes TTavares ACabral J(2018)A Hardware-assisted Translation Cache for Dynamic Binary Translation in Embedded Systems2018 IEEE 23rd International Conference on Emerging Technologies and Factory Automation (ETFA)10.1109/ETFA.2018.8502558(307-312)Online publication date: Sep-2018
https://doi.org/10.1109/ETFA.2018.8502558
Salgado FGarcia PGomes TVale JPinto SCabral JEkpanyapong M(2012)Shifting SOA to MPSoC: An exploratory example of applicationProceedings of 2012 IEEE 17th International Conference on Emerging Technologies & Factory Automation (ETFA 2012)10.1109/ETFA.2012.6489726(1-4)Online publication date: Sep-2012
https://doi.org/10.1109/ETFA.2012.6489726

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