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High-level bit-serial datapath synthesis for multi-FPGA systems

Authors:

Tsuyoshi Isshiki,

Wayne Wei-Ming DaiAuthors Info & Claims

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

Pages 167 - 173

https://doi.org/10.1145/201310.201336

Published: 15 February 1995 Publication History

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Cited By

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Bailey D(2011)ReferencesDesign for Embedded Image Processing on FPGAs10.1002/9780470828519.refs(441-473)Online publication date: 2-Jun-2011
https://doi.org/10.1002/9780470828519.refs
DeHon DAdams JDeLorimier MKapre NMatsuda YNaeimi HVanier MWrighton M(2004)Design Patterns for Reconfigurable Computing12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2004.29(13-23)Online publication date: 2004
https://doi.org/10.1109/FCCM.2004.29
Suzuki KWang MFang ZDai W(2000)Design of C++ Class Library and Bit-Serial Compiler for Variable-Precision Datapath Synthesis on Adaptive Computing SystemsProceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines10.5555/795659.795923Online publication date: 17-Apr-2000
https://dl.acm.org/doi/10.5555/795659.795923
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Index Terms

High-level bit-serial datapath synthesis for multi-FPGA systems
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
  2. Very large scale integration design
    1. Application-specific VLSI designs

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Published In

FPGA '95: Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays

February 1995

174 pages

ISBN:089791743X

DOI:10.1145/201310

Chairmen:
Pak K. Chan
Univ. of California at Santa Cruz, Santa Cruz
,
Jonathan Rose
Univ. of Toronto, Toronto, Ont., Canada

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 15 February 1995

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FPGA95

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SIGDA

FPGA95: ACM/SIGDA International Symposium on Field-Programmable Gate Arrays

February 12 - 14, 1995

California, Monterey, USA

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Overall Acceptance Rate 125 of 627 submissions, 20%

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Cited By

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Bailey D(2011)ReferencesDesign for Embedded Image Processing on FPGAs10.1002/9780470828519.refs(441-473)Online publication date: 2-Jun-2011
https://doi.org/10.1002/9780470828519.refs
DeHon DAdams JDeLorimier MKapre NMatsuda YNaeimi HVanier MWrighton M(2004)Design Patterns for Reconfigurable Computing12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines10.1109/FCCM.2004.29(13-23)Online publication date: 2004
https://doi.org/10.1109/FCCM.2004.29
Suzuki KWang MFang ZDai W(2000)Design of C++ Class Library and Bit-Serial Compiler for Variable-Precision Datapath Synthesis on Adaptive Computing SystemsProceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines10.5555/795659.795923Online publication date: 17-Apr-2000
https://dl.acm.org/doi/10.5555/795659.795923
Abke JKüter J(2000)FPGAs: Architekturen, Systeme und Schaltungspartitionierungit - Information Technology10.1524/itit.2000.42.2.2042:2Online publication date: Jan-2000
https://doi.org/10.1524/itit.2000.42.2.20
Wang MSuzuki KDai WLow YO'conner KTai KYoshida K(2000)Integration of large-scale FPGA and DRAM in a package using chip-on-chip technologyProceedings of the 2000 Asia and South Pacific Design Automation Conference10.1145/368434.368606(205-210)Online publication date: 28-Jan-2000
https://dl.acm.org/doi/10.1145/368434.368606
DeHon A(2000)The Density Advantage of Configurable ComputingComputer10.1109/2.83932033:4(41-49)Online publication date: 1-Apr-2000
https://dl.acm.org/doi/10.1109/2.839320
Stohmann JBarke E(1997)A universal Pezaris array multiplier generator for SRAM-based FPGAsProceedings International Conference on Computer Design VLSI in Computers and Processors10.1109/ICCD.1997.628913(489-495)Online publication date: 1997
https://doi.org/10.1109/ICCD.1997.628913
Wen-Jong Fang Wu ATi-Yen Yen Tsair-Chin Lin (1997)DP-Gen: a datapath generator for multiple-FPGA applicationsProceedings of ASP-DAC '97: Asia and South Pacific Design Automation Conference10.1109/ASPDAC.1997.600337(563-568)Online publication date: 1997
https://doi.org/10.1109/ASPDAC.1997.600337
Hanho Lee Sobelman G(1997)FPGA-based FIR filters using digit-serial arithmeticProceedings. Tenth Annual IEEE International ASIC Conference and Exhibit (Cat. No.97TH8334)10.1109/ASIC.1997.617010(225-228)Online publication date: 1997
https://doi.org/10.1109/ASIC.1997.617010

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